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MPC5125 Datasheet(PDF) 49 Page - Freescale Semiconductor, Inc |
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MPC5125 Datasheet(HTML) 49 Page - Freescale Semiconductor, Inc |
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49 / 92 page  Electrical and Thermal Characteristics MPC5125 Microcontroller Data Sheet, Rev. 3 Freescale Semiconductor 49 Figure 7. HRESET Behavior Figure 8. SRESET Behavior Table 19. Reset Timing Symbol Description Value (XTALI CLOCK) SpecID tPORHOLD Time PORESET must be held low before a qualified reset occurs. 4 cycles A3.10 tHRVAL Time HRESET is asserted after a qualified reset occurs. 26810 cycles1 A3.11 tSRVAL Time SRESET is asserted after assertion of HRESET. 21 cycles A3.12 tEXEC Time between SRESET assertion and first core instruction fetch. 4 cycles A3.13 tS_POR_CONF Reset configuration setup time before assertion of PORESET. 1 cycle A3.14 XTALI CLOCK PORESET SRESET HRESET RST_CONF[31:0] ADDR[31:0] tSRVAL tEXEC tHRVAL tHRHOLD tHR_SR_Delay no new fetch of the RST_CONF XTALI CLOCK PORESET SRESET HRESET RST_CONF[31:0] ADDR[31:0] tEXEC tSRMIN tSRHOLD no new fetch of the RST_CONF |
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