MPC5125 datasheet(72/92 Pages) FREESCALE

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MPC5125 Microcontroller Data Sheet, Rev. 3

Electrical and Thermal Characteristics

Freescale Semiconductor

Figure 37. Timing Diagram — I2C Input/Output

4.3.14

J1850

See the MPC5125 Reference Manual (MPC5125RM).

4.3.15

PSC

The programmable serial controllers (PSC) support different modes of operation (UART, codec, AC97, SPI).

All the timing numbers specified for different PSC modes are design targets.

4.3.15.1

Codec Mode (8-, 16-, 24-, and 32-Bit) / I2S Mode

Table 39. Timing Specifications — 8-, 16-, 24-, and 32-Bit CODEC/I2S Master Mode1

NOTES:

1 Output timing is specified at a nominal 50 pF load.

Sym

Description

Min

Typ

Max

Units

SpecID

Bit clock cycle time, programmed in CCS register

40.0

—

A20.1

Clock duty cycle

2 Bit clock cycle time.

A20.2

Bit clock fall time

—

7.9

A20.3

Bit clock rise time

—

7.9

A20.4

FrameSync valid after clock edge

—

8.4

A20.5

FrameSync invalid after clock edge

—

8.4

A20.6

Output data valid after clock edge

—

9.3

A20.7

Input data setup time

6.0

—

A20.8

SCL

SDA

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