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HCS12 Datasheet(PDF) 390 Page - Freescale Semiconductor, Inc

Part # HCS12
Description  HCS12 Microcontrollers
PDF  452 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

HCS12 Datasheet(HTML) 390 Page - Freescale Semiconductor, Inc

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S12CPUV2 Reference Manual, Rev. 4.0
390
Freescale Semiconductor
PULA
(M(SP)) ⇒ A; (SP) + 1 ⇒ SP
Pull Accumulator A from Stack
INH
32
ufO
ufO
– – – –
– – – –
PULB
(M(SP)) ⇒ B; (SP) + 1 ⇒ SP
Pull Accumulator B from Stack
INH
33
ufO
ufO
– – – –
– – – –
PULC
(M(SP)) ⇒ CCR; (SP) + 1 ⇒ SP
Pull CCR from Stack
INH
38
ufO
ufO
∆ ⇓ ∆ ∆ ∆ ∆ ∆ ∆
PULD
(M(SP):M(SP+1)) ⇒ A:B; (SP) + 2 ⇒ SP
Pull D from Stack
INH
3A
UfO
UfO
– – – –
– – – –
PULX
(M(SP):M(SP+1)) ⇒ XH:XL; (SP) + 2 ⇒ SP
Pull Index Register X from Stack
INH
30
UfO
UfO
– – – –
– – – –
PULY
(M(SP):M(SP+1)) ⇒ YH:YL; (SP) + 2 ⇒ SP
Pull Index Register Y from Stack
INH
31
UfO
UfO
– – – –
– – – –
REV
MIN-MAX rule evaluation
Find smallest rule input (MIN).
Store to rule outputs unless fuzzy output is already larger
(MAX).
For rule weights see REVW.
Each rule input is an 8-bit offset from the base address in Y.
Each rule output is an 8-bit offset from the base address in Y.
$FE separates rule inputs from rule outputs. $FF terminates
the rule list.
REV may be interrupted.
Special
18 3A
Orf(t,tx)O
Orf(t,tx)O
– – ? –
? ?
∆ ?
(exit + re-entry replaces comma
above if interrupted)
ff + Orf(t,
ff + Orf(t,
REVW
MIN-MAX rule evaluation
Find smallest rule input (MIN),
Store to rule outputs unless fuzzy output is already larger
(MAX).
Rule weights supported, optional.
Each rule input is the 16-bit address of a fuzzy input. Each rule
output is the 16-bit address of a fuzzy output. The value $FFFE
separates rule inputs from rule outputs. $FFFF terminates the
rule list.
REVW may be interrupted.
Special
18 3B
ORf(t,Tx)O
ORf(t,Tx)O
– – ? –
? ?
∆ !
(loop to read weight if enabled)
(r,RfRf)
(r,RfRf)
(exit + re-entry replaces comma
above if interrupted)
ffff + ORf(t,
fff + ORf(t,
ROL opr16a
ROL oprx0_xysp
ROL oprx9,xysp
ROL oprx16,xysp
ROL [D,xysp]
ROL [oprx16,xysp]
ROLA
ROLB
Rotate Memory Left through Carry
Rotate A Left through Carry
Rotate B Left through Carry
EXT
IDX
IDX1
IDX2
[D,IDX]
[IDX2]
INH
INH
75 hh ll
65 xb
65 xb ff
65 xb ee ff
65 xb
65 xb ee ff
45
55
rPwO
rPw
rPwO
frPwP
fIfrPw
fIPrPw
O
O
rOPw
rPw
rPOw
frPPw
fIfrPw
fIPrPw
O
O
– – – –
∆ ∆ ∆ ∆
ROR opr16a
ROR oprx0_xysp
ROR oprx9,xysp
ROR oprx16,xysp
ROR [D,xysp]
ROR [oprx16,xysp]
RORA
RORB
Rotate Memory Right through Carry
Rotate A Right through Carry
Rotate B Right through Carry
EXT
IDX
IDX1
IDX2
[D,IDX]
[IDX2]
INH
INH
76 hh ll
66 xb
66 xb ff
66 xb ee ff
66 xb
66 xb ee ff
46
56
rPwO
rPw
rPwO
frPwP
fIfrPw
fIPrPw
O
O
rOPw
rPw
rPOw
frPPw
fIfrPw
fIPrPw
O
O
– – – –
∆ ∆ ∆ ∆
RTC
(M(SP)) ⇒ PPAGE; (SP) + 1 ⇒ SP;
(M(SP):M(SP+1)) ⇒ PCH:PCL;
(SP) + 2
⇒ SP
Return from Call
INH
0A
uUnfPPP
uUnPPP
– – – –
– – – –
RTI
(M(SP)) ⇒ CCR; (SP) + 1 ⇒ SP
(M(SP):M(SP+1)) ⇒ B:A; (SP) + 2 ⇒ SP
(M(SP):M(SP+1)) ⇒ XH:XL; (SP) + 4 ⇒ SP
(M(SP):M(SP+1)) ⇒ PCH:PCL; (SP) – 2 ⇒ SP
(M(SP):M(SP+1)) ⇒ YH:YL; (SP) + 4 ⇒ SP
Return from Interrupt
INH
0B
uUUUUPPP
uUUUUPPP
∆ ⇓ ∆ ∆ ∆ ∆ ∆ ∆
(with interrupt pending)
uUUUUVfPPP
uUUUUfVfPPP
RTS
(M(SP):M(SP+1)) ⇒ PCH:PCL;
(SP) + 2
⇒ SP
Return from Subroutine
INH
3D
UfPPP
UfPPP
– – – –
– – – –
Table A-1. Instruction Set Summary (Sheet 10 of 14)
Source Form
Operation
Addr.
Mode
Machine
Coding (hex)
Access Detail
S X H I
N Z V C
HCS12
M68HC12
C
b7
b0
C
b7
b0



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