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MRF24J40-I/T Datasheet(PDF) 45 Page - Microchip Technology |
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MRF24J40-I/T Datasheet(HTML) 45 Page - Microchip Technology |
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45 / 156 page  REGISTER 2-36: GATECLK: GATED CLOCK CONTROL REGISTER (ADDRESS: 0x26) R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 r r r r GTSON r r r bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 7-4 Reserved: Maintain as ‘0’ bit 3 GTSON: GTS FIFO Clock Enable bit 1 = Enabled 0 = Disabled (default) bit 2-0 Reserved: Maintain as ‘0’ © 2010 Microchip Technology Inc. Preliminary DS39776C-page 45 MRF24J40 |
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