P89V51RB2BBC datasheet(63/80 Pages) NXP

63 / 80 page

P89V51RB2_RC2_RD2_5

Product data sheet

Rev. 05 — 12 November 2009

63 of 80

NXP Semiconductors

P89V51RB2/RC2/RD2

8-bit microcontrollers with 80C51 core

[1]

This parameter is measured only for initial qualiﬁcation and after a design or process change that could affect this parameter.

[2]

Under steady state (non-transient) conditions, IOL must be externally limited as follows:

a) Maximum IOL per 8-bit port: 26 mA

b) Maximum IOL total for all outputs: 71 mA

c) If IOL exceeds the test condition, VOH may exceed the related speciﬁcation. Pins are not guaranteed to sink current greater than the

listed test conditions.

[3]

Capacitive loading on Ports 0 and 2 may cause spurious noise to be superimposed on the VOL of ALE and Ports 1 and 3. The noise due

to external bus capacitance discharging into the Port 0 and 2 pins when the pins make 1-to-0 transitions during bus operations. In the

worst cases (capacitive loading > 100 pF), the noise pulse on the ALE pin may exceed 0.8 V. In such cases, it may be desirable to

qualify ALE with a Schmitt trigger, or use an address latch with a Schmitt trigger STROBE input.

[4]

Load capacitance for Port 0, ALE and PSEN = 100 pF, load capacitance for all other outputs = 80 pF.

[5]

Capacitive loading on Ports 0 and 2 may cause the VOH on ALE and PSEN to momentarily fall below the VDD − 0.7 V speciﬁcation when

the address bits are stabilizing.

[6]

Pins of Ports 1, 2 and 3 source a transition current when they are being externally driven from 1 to 0. The transition current reaches its

maximum value when VI is approximately 2 V.

[7]

Pin capacitance is characterized but not tested. EA = 25 pF (max).

VOH

HIGH-level output

voltage

VDD = 4.5 V; ports 1, 2, 3, ALE,

PSEN

[5]

IOH = −10 µAVDD − 0.3

IOH = −30 µAVDD − 0.7

IOH = −60 µAVDD − 1.5

VDD = 4.5 V; port 0 in External Bus

mode

IOH = −200 µAVDD − 0.3

IOH = −3.2 mA

VDD − 0.7

Vbo

brownout trip voltage

3.85

4.15

IIL

LOW-level input

current

VI = 0.4 V; ports 1, 2, 3

−75

µA

ITHL

HIGH-LOW transition

current

VI = 2 V; ports 1, 2, 3

[6] --

−650

µA

ILI

input leakage current

0.45 V < VI <VDD − 0.3 V; port 0

±10

µA

Rpd

pull-down resistance

on pin RST

225

Ω

Ciss

input capacitance

1 MHz; Ta =25 °C; VI =0V

[7] -

IDD(oper)

operating supply

current

fosc = 12 MHz

fosc = 40 MHz

IDD(idle)

Idle mode supply

current

fosc = 12 MHz

fosc = 40 MHz

IDD(pd)

Power-down mode

supply current

minimum VDD =2V

Ta = 0 °C to +70 °C-

µA

Ta = −40 °C to +85 °C-

µA

Table 62.

Static characteristics …continued

Ta =0 °C to +70 °C or −40 °Cto+85 °C; VDD = 4.5 V to 5.5 V; VSS =0V

Symbol Parameter

Conditions

Min

Typ

Max

Unit

P89V51RB2BBC Datasheet(PDF) 63 Page - NXP Semiconductors

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