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TMS320F28023DAS Datasheet(PDF) 87 Page - Texas Instruments |
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TMS320F28023DAS Datasheet(HTML) 87 Page - Texas Instruments |
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87 / 130 page  TMS320F28027, TMS320F28026, TMS320F28023, TMS320F28022 TMS320F28021, TMS320F28020, TMS320F280200 www.ti.com SPRS523F – NOVEMBER 2008 – REVISED DECEMBER 2010 6.7.3 Device Clock Table This section provides the timing requirements and switching characteristics for the various clock options available on the 2802x MCUs. Table 6-5, Table 6-6, and Table 6-7 list the cycle times of various clocks. Table 6-5. 2802x Clock Table and Nomenclature (40-MHz Devices) MIN NOM MAX UNIT tc(SCO), Cycle time 25 500 ns SYSCLKOUT Frequency 2 40 MHz tc(LCO), Cycle time 25 100(2) ns LSPCLK(1) Frequency 10(2) 40 MHz tc(ADCCLK), Cycle time 25 ns ADC clock Frequency 40 MHz (1) Lower LSPCLK will reduce device power consumption. (2) This is the default reset value if SYSCLKOUT = 40 MHz. Table 6-6. 2802x Clock Table and Nomenclature (50-MHz Devices) MIN NOM MAX UNIT tc(SCO), Cycle time 20 500 ns SYSCLKOUT Frequency 2 50 MHz tc(LCO), Cycle time 20 80(2) ns LSPCLK(1) Frequency 12.5(2) 50 MHz tc(ADCCLK), Cycle time 20 ns ADC clock Frequency 50 MHz (1) Lower LSPCLK will reduce device power consumption. (2) This is the default reset value if SYSCLKOUT = 50 MHz. Table 6-7. 2802x Clock Table and Nomenclature (60-MHz Devices) MIN NOM MAX UNIT tc(SCO), Cycle time 16.67 500 ns SYSCLKOUT Frequency 2 60 MHz tc(LCO), Cycle time 16.67 66.67(2) ns LSPCLK(1) Frequency 15(2) 60 MHz tc(ADCCLK), Cycle time 16.67 ns ADC clock Frequency 60 MHz (1) Lower LSPCLK will reduce device power consumption. (2) This is the default reset value if SYSCLKOUT = 60 MHz. Copyright © 2008–2010, Texas Instruments Incorporated Electrical Specifications 87 Submit Documentation Feedback Product Folder Link(s): TMS320F28027 TMS320F28026 TMS320F28023 TMS320F28022 TMS320F28021 TMS320F28020 TMS320F280200 |
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