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TMS320F28023DAS Datasheet(PDF) 97 Page - Texas Instruments |
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TMS320F28023DAS Datasheet(HTML) 97 Page - Texas Instruments |
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97 / 130 page ![]() TMS320F28027, TMS320F28026, TMS320F28023, TMS320F28022 TMS320F28021, TMS320F28020, TMS320F280200 www.ti.com SPRS523F – NOVEMBER 2008 – REVISED DECEMBER 2010 Table 6-19. STANDBY Mode Timing Requirements TEST CONDITIONS MIN NOM MAX UNIT Without input qualification 3tc(OSCCLK) Pulse duration, external tw(WAKE-INT) cycles wake-up signal With input qualification(1) (2 + QUALSTDBY) * tc(OSCCLK) (1) QUALSTDBY is a 6-bit field in the LPMCR0 register. Table 6-20. STANDBY Mode Switching Characteristics PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Delay time, IDLE instruction td(IDLE-XCOL) 32tc(SCO) 45tc(SCO) cycles executed to XCLKOUT low Delay time, external wake signal to program execution cycles resume(1) Without input qualifier 100tc(SCO) • Wake up from flash cycles – Flash module in active With input qualifier 100tc(SCO) + tw(WAKE-INT) state td(WAKE-STBY) Without input qualifier 1125tc(SCO) • Wake up from flash cycles – Flash module in sleep With input qualifier 1125tc(SCO) + tw(WAKE-INT) state Without input qualifier 100tc(SCO) cycles • Wake up from SARAM With input qualifier 100tc(SCO) + tw(WAKE-INT) (1) This is the time taken to begin execution of the instruction that immediately follows the IDLE instruction. execution of an ISR (triggered by the wake up signal) involves additional latency. Copyright © 2008–2010, Texas Instruments Incorporated Electrical Specifications 97 Submit Documentation Feedback Product Folder Link(s): TMS320F28027 TMS320F28026 TMS320F28023 TMS320F28022 TMS320F28021 TMS320F28020 TMS320F280200 |
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