R5F107ACMSP datasheet(97/107 Pages) RENESAS

97 / 107 page

RL78/G1C

ELECTRICAL SPECIFICATIONS (G: TA = -40 to +105

°C)

Page 97 of 135

R01DS0348EJ0100

Rev.1.00

Aug 08, 2013

3.5

Peripheral Functions Characteristics

3.5.1

Serial array unit

(1) During communication at same potential (UART mode) (dedicated baud rate generator output)

(TA =

−40 to +105°C, 2.4 V ≤ VDD ≤ 5.5 V, VSS = 0 V)

Parameter

Symbol

Conditions

MIN.

TYP.

MAX.

Unit

fMCK/12

bps

Transfer rate

Theoretical value of the

maximum transfer rate

fMCK = fCLK

Note

2.0

Mbps

Note The maximum operating frequencies of the CPU/peripheral hardware clock (fCLK) are:

HS (high-speed main) mode:

24 MHz (2.7 V

≤ VDD ≤ 5.5 V)

16 MHz (2.4 V

≤ VDD ≤ 5.5 V)

Caution

Select the normal input buffer for the RxDq pin and the normal output mode for the TxDq pin by

using port input mode register g (PIMg) and port output mode register g (POMg).

UART mode connection diagram (during communication at same potential)

User's device

TxDq

RxDq

RL78 microcontroller

UART mode bit width (during communication at same potential) (reference)

Baud rate error tolerance

High-/Low-bit width

1/Transfer rate

TxDq

RxDq

Remarks 1.

q: UART number (q = 0), g: PIM and POM number (g = 5)

fMCK: Serial array unit operation clock frequency

(Operation clock to be set by the CKSmn bit of serial mode register mn (SMRmn). m: Unit number,

n: Channel number (mn = 00))

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