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AFS600-FGG484ES Datasheet(PDF) 3 Page - Microsemi Corporation |
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AFS600-FGG484ES Datasheet(HTML) 3 Page - Microsemi Corporation |
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3 / 334 page  Fusion Family of Mixed Signal FPGAs Revision 4 III Product Ordering Codes Fusion Device Status Notes: 1. For Fusion devices, Quad Flat No Lead packages are only offered as RoHS compliant, QNG packages. 2. MicroBlade and Pigeon Point devices only support FG packages. Fusion Status Cortex-M1 Status Pigeon Point Status MicroBlade Status AFS090 Production AFS250 Production M1AFS250 Production U1AFS250 Production AFS600 Production M1AFS600 Production P1AFS600 Production U1AFS600 Production AFS1500 Production M1AFS1500 Production P1AFS1500 Production U1AFS1500 Production M1AFS600 FG _ Part Number Fusion Devices Speed Grade 1 Blank = Standard 1 = 15% Faster than Standard 2 = 25% Faster than Standard Package Type QN = Quad Flat No Lead (0.5 mm pitch) 256 I G Package Lead Count Y Security Feature Application (junction temperature range) Blank = Commercial (0 to +85°C) I = Industrial (–40 to +100°C) PP = Pre-Production ES = Engineering Silicon (room temperature only) 90,000 System Gates AFS090 = 250,000 System Gates AFS250 = ARM-Enabled Fusion Devices 600,000 System Gates AFS600 = 1,500,000 System Gates AFS1500 = MicroBlade Devices 250,000 System Gates U1AFS250 = 600,000 System Gates U1AFS600 = 1,500,000 System Gates U1AFS1500 = Pigeon Point Devices 600,000 System Gates P1AFS600 = 1,500,000 System Gates P1AFS1500 = 250,000 System Gates M1AFS250 = 600,000 System Gates M1AFS600 = 1,500,000 System Gates M1AFS1500 = PQ = Plastic Quad Flat Pack (0.5 mm pitch) FG = Fine Pitch Ball Grid Array (1.0 mm pitch) Lead-Free Packaging Options Blank = Standard Packaging G = RoHS-Compliant (green) Packaging 1 2 Y = Device Includes License to Implement IP Based on the Cryptography Research, Inc. (CRI) Patent Portfolio Blank = Device Does Not Include License to Implement IP Based on the Cryptography Research, Inc. (CRI) Patent Portfolio |
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