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PIC18F1220E/SOSQTP Datasheet(PDF) 157 Page - Microchip Technology |
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PIC18F1220E/SOSQTP Datasheet(HTML) 157 Page - Microchip Technology |
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157 / 308 page ![]() © 2007 Microchip Technology Inc. DS39605F-page 155 PIC18F1220/1320 17.0 10-BIT ANALOG-TO-DIGITAL CONVERTER (A/D) MODULE The Analog-to-Digital (A/D) converter module has seven inputs for the PIC18F1220/1320 devices. This module allows conversion of an analog input signal to a corresponding 10-bit digital number. A new feature for the A/D converter is the addition of programmable acquisition time. This feature allows the user to select a new channel for conversion and to set the GO/DONE bit immediately. When the GO/DONE bit is set, the selected channel is sampled for the pro- grammed acquisition time before a conversion is actu- ally started. This removes the firmware overhead that may have been required to allow for an acquisition (sampling) period (see Register 17-3 and Section 17.3 “Selecting and Configuring Automatic Acquisition Time”). The module has five registers: • A/D Result High Register (ADRESH) • A/D Result Low Register (ADRESL) • A/D Control Register 0 (ADCON0) • A/D Control Register 1 (ADCON1) • A/D Control Register 2 (ADCON2) The ADCON0 register, shown in Register 17-1, controls the operation of the A/D module. The ADCON1 register, shown in Register 17-2, configures the functions of the port pins. The ADCON2 register, shown in Register 17-3, configures the A/D clock source, programmed acquisition time and justification. REGISTER 17-1: ADCON0: A/D CONTROL REGISTER 0 R/W-0 R/W-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 VCFG1 VCFG0 — CHS2 CHS1 CHS0 GO/DONE ADON bit 7 bit 0 bit 7-6 VCFG<1:0>: Voltage Reference Configuration bits bit 5 Unimplemented: Read as ‘0’ bit 4-2 CHS2:CHS0: Analog Channel Select bits 000 = Channel 0 (AN0) 001 = Channel 1 (AN1) 010 = Channel 2 (AN2) 011 = Channel 3 (AN3) 100 = Channel 4 (AN4) 101 = Channel 5 (AN5) 110 = Channel 6 (AN6) 111 = Unimplemented(1) bit 1 GO/DONE: A/D Conversion Status bit When ADON = 1: 1 = A/D conversion in progress 0 = A/D Idle bit 0 ADON: A/D On bit 1 = A/D converter module is enabled 0 = A/D converter module is disabled Note 1: Performing a conversion on unimplemented channels returns full-scale results. Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown A/D VREF+A/D VREF- 00 AVDD AVSS 01 External VREF+AVSS 10 AVDD External VREF- 11 External VREF+ External VREF- |
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