EVAL-AD5933EB

Preliminary Technical Data

Rev. PrC | Page 6 of 32

NC

NC

NC

RFB

VIN

VOUT

NC

MCLK

SCL

SDA

AGND2

AGND1

DGND

AVDD2

AVDD1

DVDD

U6

AD5933

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

T1

T2

T5

T6

LK7

6

7

4

2

3

+VIN

TRIM

VOUT

GND

U4

ADR423

C32

0.1µF

C31

10µF

2

5

6

4

CLK2

LK6

LK2

LK3

LK12

LK10

LK5

C25

10µF

C26

0.1µF

C30

10µF

C28

0.1µF

C2

10µF

C24

0.1µF

C29

10µF

C27

0.1µF

LK8

LK9

C42

15pF

VDD_AMP

R4

R3

R1

50Ω

DGND

CLK1

DGND

VDD O/P

GND

XTAL1

C1

0.1nF

43

2

DVDD_5V

AVDD_SIG

AVDD_REF

DGND

DVDD_5V

LK1

DGND

DGND

T7

T8

SCL

SDA

VDD_REF

AGND DGND

AD820

U1

OUT

LK4

R2

LK11

5VUSB

NC = NO CONNECT

+

–

TEST

IMPEDANCE

FEEDBACK

RESISTOR

C41

Figure 2. Setup Link Position Circuit (A 15 pF Capacitor Connected Between VIN and VOUT, with RFB = 200 kΩ and a Precision 16 MHz Connected to MCLK)