EVALAD5933EB datasheet(10/32 Pages) AD

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EVAL-AD5933EB

Preliminary Technical Data

Rev. PrC | Page 10 of 32

Figure 12. Expected Warning Message

After the hardware has been successfully installed, the Found

New Hardware

message, stating that your new hardware is

installed and ready to use, appears, as shown in Figure 13.

Figure 13. Successful Hardware Installation

STEP 3—VERIFY THE LINKS AND POWER UP THE

EVALUATION BOARD

Ensure that the relevant links are in place on the evaluation

board (see Table 2 and Table 4) and that the proper power

connections and supply values are made to the terminal blocks

before applying power to the evaluation board.

The power supply terminal blocks are outlined in Table 1. Note

that the USB connector will supply power only to the Cypress

USB controller chip that interfaces to the AD5933. It does not

act as a supply source to the AD5933 if LK4, LK5, LK10, LK11,

and LK12 are removed.

The user can provide a dedicated external voltage supply to

each terminal block, if required. The user must ensure that all

relevant power supply connections and links are made before

running the evaluation software.

For optimum performance, it is recommended that the user

supply the three supply signals (AVDD1, AVDD2, and DVDD)

from a stable external reference supply via the power supply

terminal blocks on the board as outlined in Table 1.

STEP 4—PERFORM A FREQUENCY SWEEP

The sequence for performing a linear frequency sweep across

a 200 kΩ resistive impedance connected across the VOUT and

VIN pins within the frequency range of 30 kHz to 30.2 kHz is

outlined in this section. The default software settings for the

evaluation board are shown in Figure 14 (note that a 200 kΩ

resistor must be connected across the VIN and VOUT pins of

the AD5933). The default link positions are outlined in Table 4

and should be reviewed before continuing with Step 4.

The sequence for opening the software is to go to Start >

Programs

> Analog Devices > AD5933 and then click

AD5933 Evaluation Software

When the graphic user interface program is open and runs

successfully, the dialog box shown in Figure 14 appears. The

figure shows the interface panel along with a frequency sweep

impedance profile for a 200 kΩ resistive impedance (note that

RFB = 200 kΩ).

This section describes how to set up a typical sweep across a

200 kΩ impedance (when RFB = 200 kΩ) using the installed

AD5933 software. The theory of operation and the internal

system architecture of the AD5933 device are described in detail

in the AD5933 data sheet. This is available at www.analog.com

and should be consulted when using the evaluation board.

Set the start frequency to 30000 Hz in the Start Frequency (Hz)

box (see Arrow 1A). The start frequency is 24-bit accurate.

Set the frequency sweep step size to 2 (Hz) in the Delta Frequency

box (see Arrow 1A). The frequency step size is also 24-bit accurate.

To set the number of increments along the sweep to 200, type 200

into the Number Increments (9 Bit) box (see Arrow 1A). The

maximum number of increments that the device can sweep across

is 511. The value entered is stored in a register as a 9-bit value.

The delay between the time that a frequency increment takes

place on the output of the internal DDS core and the time that

the ADC samples the response signal at this new frequency is

determined by the contents of the Number of Settling Time

Cycles

registers (0x8Ah and 0x8Bh). See the AD5933 data sheet

for further details on the settling time cycle register.

For example, if the user programs a value of 15 into the Number

of Settling Time Cycles

box in the main dialog box and the next

output frequency is 32 kHz, the delay between the time that the

DDS core starts to output the 32 kHz signal and the time that the

ADC samples the response signal is 15 × (1/32 kHz) ≈ 468.7 μs.

The maximum Number of Settling Time Cycles that can be

programmed to the board is 511 cycles. The value is stored in a

a factor of 2 or 4.

Type 15 (cycles) into the Number of Settling Time Cycles box

(see Arrow 1A). If you are sweeping across a high-Q structure,

such as a resonant impedance, it is your responsibility to ensure

that the contents of the settling time cycles register are sufficient

for the impedance being tested to settle before incrementing

between each successive frequency in the programmed sweep.

This is achieved by increasing the value within the Number of

Settling Time Cycles

box.

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