Preliminary Technical Data

EVAL-AD5933EB

Rev. PrC | Page 3 of 32

EVALUATION BOARD HARDWARE

TERMINAL BLOCK FUNCTIONS

Table 1. Terminal Block Function Descriptions

Pin

Name

Description

J1

USB

USB Hub for the Evaluation Board.

J2-1

DVDD-5V

Digital Circuitry Supply Connection to Pin 9. This connector is decoupled to the digital ground plane via

standard 0.1 μF and 10 μF suppression capacitors. This connector also supplies the high performance, 16 MHz,

surface-mount crystal with the required operating supply voltage.

J2-2

DGND

Digital Ground Connection. This connector is decoupled to J2-1 using standard 0.1 μF and 10 μF suppression

capacitors. The digital ground plane is connected to the analog ground plane at a single point underneath the board.

J3 -1

VDD-AMP

Single-Supply Amplifier Connection. There is a facility to place a single-supply operational amplifier (user

supplied) on the output voltage pin (VOUT) of the AD5933. This terminal block is a connection to the single-

supply positive rail of the operation amplifier.

J3-2

AGND

Analog Ground Connection. This connector is decoupled to J3-1 using standard 0.1 μF and 10 μF suppression

capacitors. The analog ground plane is connected to the digital ground plane at a single point underneath the board.

J4-1

AVDD-REF

Analog Reference Input Supply to Pin 11. This connector is decoupled to J4-2 via standard 0.1 μF and 10 μF

suppression capacitors.

J4-2

AGND

Analog Ground Connection. This connector is decoupled to J4-1 using standard 0.1 μF and 10 μF suppression

capacitors. The analog ground plane is connected to the digital ground plane at a single point underneath the board.

J5-1

AVDD-SIG

Analog Circuit Input Supply to Pin 10. This connector is decoupled to J5-2 via standard 0.1 μF and 10 μF

suppression capacitors.

J5-2

AGND

Analog Ground Connection. This connector is decoupled to J5-1 using standard 0.1 μF and 10 μF suppression

capacitors. The analog ground plane is connected to the digital ground plane at a single point underneath the board.

J6-1

VDD-REF

Power Supply Connection for On-Board Reference. This provides a connection to the power supply pin of the

on-board reference at U4 (ADR423).

J6-2

AGND

Analog Ground Connection. This connector is decoupled to J6-1 using standard 0.1 μF and 10 μF suppression

capacitors. The analog ground plane is connected to the digital ground plane at a single point underneath the board.

LINK FUNCTIONS

Table 2. Link Function Descriptions

Link No.

Function

LK1

Link 1 is used to connect the output of the optional user-supplied external operational amplifier (U1) to the VOUT SMB

connector (see Figure 1). This op amp can be used to amplify/buffer the output excitation voltage from the AD5933.

Link 1 is used in conjunction with Link 6 and Link 2. When Link 1 and Link 2 are inserted, Link 6 should be removed and vice

versa. The output of the AD5933 either can be connected to the external op amp by removing Link 6 (LK6) and inserting Link 1

and Link 2 (LK1 and LK2) and then routing to SMB VOUT or can be directly routed to SMB VOUT by removing Link 1 and Link 2

(LK1 and LK2) and inserting Link 6 (LK6). Therefore, the signal path is determined by suitably inserting/removing Link 1, Link 2,

and Link 6.

•

When Link 1 is inserted, the output of the user-supplied amplifier (for example, AD820 or OP196) is applied to the SMB

output, VOUT. When Link 1 and Link 2 are inserted, Link 6 should be removed to connect the noninverting op amp input

in series with the AD5933 output pin.

•

When Link 1 is removed, the output of the user-supplied amplifier is no longer applied to the SMB output, VOUT. When Link 1

and Link 2 are removed, Link 6 should be inserted to connect the AD5933 output pin directly to the VOUT SMB connector.

LK2

This link option is used to connect the output excitation signal from Pin 6 (VOUT) of the AD5933 to the noninverting terminal

of the user-supplied operational amplifier. This link is used in conjunction with Link 1 and Link 6. When Link 1 and Link 2 are

inserted, Link 6 should be removed and vice versa.

•

When Link 2 (LK2) is inserted, the output of the AD5933 excitation voltage pin (Pin 6) is applied to the noninverting

terminal (Pin 3 of U1) of the user-supplied operational amplifier.

•

When Link 2 is removed, the output of the AD5933 excitation voltage pin (Pin 6) is no longer applied to the noninverting

terminal (Pin 3 of U1) of the user-supplied operational amplifier, but is routed directly to the SMB VOUT if Link 6 (LK6) is

inserted.

LK3

The AD5933 can have an external clock signal applied to Pin 8 (MCLK) or can be clocked internally using the internal RC oscillator.

A high performance, 16 MHz, surface-mount crystal is supplied with the evaluation board (Y2). However, the user can provide

an alternative clock signal by applying a system clock signal through the CLK1 SMB connector. To do this, remove Link 12 (LK12)

and insert Link 3 (LK3). As a result, the clock signal applied at CLK1 will be connected to the clock pin (MCLK).