EVALAD5933EB datasheet(22/32 Pages) AD

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EVAL-AD5933EB

Preliminary Technical Data

Rev. PrC | Page 22 of 32

For example, assume the following:

•

The unknown test impedance limits are defined by

kΩ

220

kΩ

180

≤

UNKNOWN

•

The frequency range of interest is 30 kHz and 32 kHz

•

The following are the system calibration gain settings:

VDD = 3.3 V

Gain setting resistor (RFB) = 200 kΩ

ZCALIBRATION = 200 kΩ

PGA setting = ×1

Calibration frequency = 31 kHz (midpoint frequency)

The gain factor calculated at the midpoint frequency of 31 kHz

can be used to calculate any impedance in the 180 kΩ to 220 Ω

range. If the unknown impedance span or the frequency sweep

is too large, the accuracy of the calculated impedance

measurement degrades. In addition, if any of the calibration

system gain settings change, you must recalibrate the AD5933

and recalculate the gain factor (see the AD5933 data sheet for

further details).

Measuring Small Impedances

The AD5933 is capable of measuring impedance values of up to

10 MΩ if the system gain settings are chosen correctly for the

impedance subrange of interest. However, there are two points

to understand when measuring small impedances with the

AD5933.

First, if the user places a small impedance value (< ≈ 500 Ω over

the sweep frequency of interest) between the VOUT and VIN

pins, the signal current flowing through the impedance for a

fixed excitation voltage increases in accordance with Ohm’s law.

The output stage of the transmit side amplifier that is available

at the VOUT pin may not be able to provide the required

increase in current through the impedance. In addition, to

ensure a unity gain condition on the receive side I-V amplifier,

there must be a similar small value of feedback resistance for

system calibration, as outlined in the Calibrating the AD5933

section. The voltage presented at the VIN pin is hard biased at

VDD/2 due to the virtual earth on the receive side I-V amplifier

(see the AD5933 data sheet for further details). The increased

current’s sink/source requirement on the output of the receive

side I-V amplifier may also cause the amplifier to operate

outside of the linear region, resulting in significant errors in

subsequent impedance measurements.

Second, the value of the output series resistance (ROUT see

Figure 28 ) at the VOUT pin of the AD5933 must be taken into

account when measuring small impedances (ZUNKNOWN),

specifically when the value of the output series resistance is

comparable to the value of the impedance being tested

(ZUNKNOWN). If the ROUT value is unaccounted for in the system

calibration (that is, the gain factor calculation) when measuring

small impedances, an error will be introduced in subsequent

impedance measurements. (The error introduced depends on

the relative magnitude of the impedance being tested compared

with the value of the output series resistance.)

The value of the output series resistance depends on the

selected output excitation range at VOUT, and, like with all

discrete resistors manufactured in a silicon fabrication process,

the tolerance varies from device to device. Typical values of the

output series resistance are listed in Table 6.

Table 6. Output Series Resistance (ROUT) vs. Excitation Range

Parameter

Value (Typ)

Output Series

Resistance Value (Typ)

Range 1

2 V p-p

200 Ω

Range 2

1 V p-p

2.4 kΩ

Range 3

0.4 V p-p

1.0 kΩ

Range 4

0.2 V p-p

600 Ω

Therefore, to accurately calibrate the AD5933 to measure small

impedances, it is necessary to reduce the signal current by

sufficiently attenuating the excitation voltage and to account for

the output series resistance value (ROUT) by factoring it into the

gain factor calculation (see the AD5933 data sheet for further

details).

During device characterization, measuring the output series

resistance value (ROUT) was achieved by selecting the appropriate

output excitation range at VOUT and then sinking and sourcing

a known current (for example, ±2 mA) at the pin and measuring

the change in dc voltage. The output series resistance was cal-

culated by measuring the inverse of the slope (that is, 1/slope)

of the resultant I-V plot.

A circuit that helps to minimize the effects of the two previously

described issues is shown in Figure 28. The aim of this circuit is

to place the AD5933 system gain within its linear range when

measuring small impedances by using an additional external

amplifier circuit along the signal path. The external amplifier

attenuates the peak-to-peak excitation voltage at VOUT if the

user chooses suitable values for Resistors R1 and R2. This

reduces the signal current flowing through the impedance and

minimizing the effect of the output series resistance in the

impedance calculations.

In the circuit shown in Figure 28, the impedance being tested

(ZUNKNOWN) sees the output series resistance of the external

amplifier. This value is typically much less than 1 Ω with

feedback applied, depending on the op amp device (for

example, AD820, AD8641, or AD8531), the load current, the

bandwidth, and the gain.

The key point is that the output impedance of the external

amplifier in Figure 28, which is also in series with the

impedance being tested (ZUNKNOWN), has a far less significant

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