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PIC16C72-04/SP Datasheet(PDF) 40 Page - Microchip Technology |
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PIC16C72-04/SP Datasheet(HTML) 40 Page - Microchip Technology |
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40 / 124 page ![]() PIC16C72 Series DS39016A-page 40 Preliminary © 1998 Microchip Technology Inc. 8.2 SPI Mode for PIC16C72 This section contains register definitions and opera- tional characteristics of the SPI module on the PIC16C72 device only. Additional information on SPI operation may be found in the PICmicro™ Mid-Range MCU Reference Manual, DS33023. FIGURE 8-1: SSPSTAT: SYNC SERIAL PORT STATUS REGISTER (ADDRESS 94h) (PIC16C72) U-0 U-0 R-0 R-0 R-0 R-0 R-0 R-0 — — D/A P S R/W UA BF R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ - n =Value at POR reset bit7 bit0 bit 7-6: Unimplemented: Read as '0' bit 5: D/A: Data/Address bit (I2C mode only) 1 = Indicates that the last byte received or transmitted was data 0 = Indicates that the last byte received or transmitted was address bit 4: P: Stop bit (I2C mode only. This bit is cleared when the SSP module is disabled, SSPEN is cleared) 1 = Indicates that a stop bit has been detected last (this bit is '0' on RESET) 0 = Stop bit was not detected last bit 3: S: Start bit (I2C mode only. This bit is cleared when the SSP module is disabled, SSPEN is cleared) 1 = Indicates that a start bit has been detected last (this bit is '0' on RESET) 0 = Start bit was not detected last bit 2: R/W: Read/Write bit information (I2C mode only) This bit holds the R/W bit information following the last address match. This bit is valid from the address match to the next start bit, stop bit, or ACK bit. 1 = Read 0 = Write bit 1: UA: Update Address (10-bit I2C mode only) 1 = Indicates that the user needs to update the address in the SSPADD register 0 = Address does not need to be updated bit 0: BF: Buffer Full Status bit Receive (SPI and I2C modes) 1 = Receive complete, SSPBUF is full 0 = Receive not complete, SSPBUF is empty Transmit (I2C mode only) 1 = Transmit in progress, SSPBUF is full 0 = Transmit complete, SSPBUF is empty |
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