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PIC16C72-04/SP Datasheet(PDF) 80 Page - Microchip Technology |
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PIC16C72-04/SP Datasheet(HTML) 80 Page - Microchip Technology |
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80 / 124 page ![]() PIC16C72 Series DS39016A-page 80 Preliminary © 1998 Microchip Technology Inc. 13.2 DC Characteristics: PIC16LC72/LCR72-04 (Commercial, Industrial) DC CHARACTERISTICS Standard Operating Conditions (unless otherwise stated) Operating temperature -40˚C ≤ TA ≤ +85˚C for industrial and 0˚C ≤ TA ≤ +70˚C for commercial Param No. Characteristic Sym PIC16C72 PIC16CR72 Units Conditions Min Typ† Max Min Typ† Max D001 Supply Voltage VDD 2.5 - 6.0 2.5 - 5.5 V LP, XT, RC (DC - 4 MHz) D002* RAM Data Retention Voltage (Note 1) VDR - 1.5 - - 1.5 - V D003 VDD start voltage to ensure internal Power- on Reset signal VPOR - VSS - - VSS - V See section on Power- on Reset for details D004* VDD rise rate to ensure internal Power-on Reset signal SVDD 0.05 - - 0.05 - - V/ms See section on Power- on Reset for details D005 Brown-out Reset Volt- age Bvdd 3.7 4.0 4.3 3.7 4.0 4.3 V BODEN bit in configura- tion word enabled D010 Supply Current (Note 2,5) IDD - 2.0 3.8 - 2.0 3.8 mA XT, RC osc configuration FOSC = 4 MHz, VDD = 3.0V (Note 4) D010A - 22.5 48 - 22.5 48 µA LP osc configuration FOSC = 32 kHz, VDD = 3.0V, WDT disabled D015* Brown-out Reset Current (Note 6) ∆Ibor - 350 425 - 350 425 µA BOR enabled VDD = 5.0V D020 Power-down Current (Note 3,5) IPD - 7.5 30 - 7.5 30 µA VDD = 3.0V, WDT enabled, -40 °C to +85°C D021 - 0.9 5 - 0.9 5 µA VDD = 3.0V, WDT dis- abled, 0 °C to +70°C D021A - 0.9 5 - 0.9 5 µA VDD = 3.0V, WDT dis- abled, -40 °C to +85°C D023* Brown-out Reset Current (Note 6) ∆Ibor - 350 425 - 350 425 µA BOR enabled VDD = 5.0V * These parameters are characterized but not tested. † Data in "Typ" column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: This is the limit to which VDD can be lowered without losing RAM data. Note 2: The supply current is mainly a function of the operating voltage and frequency. Other factors such as I/O pin loading and switching rate, oscillator type, internal code execution pattern, and temperature also have an impact on the current con- sumption. The test conditions for all IDD measurements in active operation mode are: OSC1 = external square wave, from rail to rail; all I/O pins tristated, pulled to VDD MCLR = VDD; WDT enabled/disabled as specified. Note 3: The power-down current in SLEEP mode does not depend on the oscillator type. Power-down current is measured with the part in SLEEP mode, with all I/O pins in hi-impedance state and tied to VDD and VSS. Note 4: For RC osc configuration, current through Rext is not included. The current through the resistor can be estimated by the formula Ir = VDD/2Rext (mA) with Rext in kOhm. Note 5: Timer1 oscillator (when enabled) adds approximately 20 µA to the specification. This value is from characterization and is for design guidance only. This is not tested. Note 6: The ∆ current is the additional current consumed when this peripheral is enabled. This current should be added to the base IDD or IPD measurement. |
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