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PIC16LC62B-04/P Datasheet(PDF) 60 Page - Microchip Technology |
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PIC16LC62B-04/P Datasheet(HTML) 60 Page - Microchip Technology |
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60 / 120 page ![]() PIC16C62B/72A DS35008B-page 60 Preliminary © 1999 Microchip Technology Inc. 10.8 Time-out Sequence When a POR reset occurs, the PWRT delay starts (if enabled). When PWRT ends, the OST counts 1024 oscillator cycles (LP, XT, HS modes only). When OST completes, the device comes out of reset. The total time-out will vary based on oscillator configuration and the status of the PWRT. For example, in RC mode with the PWRT disabled, there will be no time-out at all. If MCLR is kept low long enough, the time-outs will expire. Bringing MCLR high will begin execution imme- diately. This is useful for testing purposes or to synchro- nize more than one PIC16CXXX device operating in parallel. Table 10-5 shows the reset conditions for the STATUS, PCON and PC registers, while Table 10-6 shows the reset conditions for all the registers. 10.9 Power Control/Status Register (PCON) The BOR bit is unknown on Power-on Reset. If the Brown-out Reset circuit is used, the BOR bit must be set by the user and checked on subsequent resets to see if it was cleared, indicating a Brown-out has occurred. POR (Power-on Reset Status bit) is cleared on a Power-on Reset and unaffected otherwise. The user Status Register PCON Register TABLE 10-3 TIME-OUT IN VARIOUS SITUATIONS TABLE 10-4 STATUS BITS AND THEIR SIGNIFICANCE TABLE 10-5 RESET CONDITION FOR SPECIAL REGISTERS IRP RP1 RP0 TO PD Z DC C POR BOR Oscillator Configuration Power-up Brown-out Wake-up from SLEEP PWRTE = 0 PWRTE = 1 XT, HS, LP 72 ms + 1024TOSC 1024TOSC 72 ms + 1024TOSC 1024TOSC RC 72 ms —72 ms — POR BOR TO PD 0x 1 1 Power-on Reset 0x 0 x Illegal, TO is set on POR 0x x 0 Illegal, PD is set on POR 10 1 1 Brown-out Reset 11 0 1 WDT Reset 11 0 0 WDT Wake-up 11 u u MCLR Reset during normal operation 11 1 0 MCLR Reset during SLEEP or interrupt wake-up from SLEEP Condition Program Counter STATUS Register PCON Register Power-on Reset 000h 0001 1xxx ---- --0x MCLR Reset during normal operation 000h 000u uuuu ---- --uu MCLR Reset during SLEEP 000h 0001 0uuu ---- --uu WDT Reset 000h 0000 1uuu ---- --uu WDT Wake-up PC + 1 uuu0 0uuu ---- --uu Brown-out Reset 000h 0001 1uuu ---- --u0 Interrupt wake-up from SLEEP PC + 1 (1) uuu1 0uuu ---- --uu Legend: u = unchanged, x = unknown, - = unimplemented bit read as '0'. Note 1: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h). |
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