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TLE9263QX Datasheet(PDF) 96 Page - Infineon Technologies AG

Part # TLE9263QX
Description  Dedicated Data Sheets are available for the different product variants
PDF  164 Pages
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

TLE9263QX Datasheet(HTML) 96 Page - Infineon Technologies AG

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Data Sheet
96
Rev. 1.1, 2014-09-26
TLE9263QX
Fail Outputs
•
FO3: 100Hz PWM, 20% (typ.) duty cycle, e.g. to generate a dimmed rear light from a break light.
Note: The duty cycle for FO3 can be configured via SPI option to 20%, 10%, 5% or 2.5%. Default value is 20%.
See the register FO_DC for configuration.
14.1.1
General Purpose I/O Functionality of FO2 and FO3 as Alternate Function
In case that FO2 and FO3 are not used in the application, those pins can also be configured with an alternate
function as high-voltage (VSHS related) General Purpose I/O pins.
Figure 45
Simplified General Purpose I/O block diagram for FO2 and FO3/TEST
The pins are by default configured as FO pins. The configuration is done via the SPI register GPIO_CTRL. The
alternate function can be:
•
Wake Inputs: The detection threshold VGPIOI,th is similar as for the WK inputs. The wake-up detection behavior
is the same as for WKx pins. Wake events are stored and reported in WK_STAT_2.
•
Low-Side Switches: The switch is able to drive currents of up to 10mA (see also VGPIOL,L1). It is self-protected
with regards to current limitation. No other diagnosis is implemented.
•
High-Side Switches: The switch is able to drive currents up to 10mA (see also VGPIOH,H1). It is self-protected
with regards to current limitation. No other diagnosis is implemented.
•
If configured as GPIO then the respective level at the pin will be shown in WK_LVL_STAT in SBC Normal and
Stop Mode. This is also the case if configured as LS/HS and can serve as a feedback about the respective
state. GPIO2 is shared with the TEST level bit.
Figure 46 describes the behavior of the FO/GPIO pins in their different configurations and SBC modes.
Figure 46
FO / GPIO behavior for the respective SBC modes
Note: In order to avoid unintentional entry of SBC Development Mode care must be taken that the level of
FO3/TEST is HIGH during device power up and SBC Init Mode.
Note: The FOx drivers are supplied via VS. However, the GPIO HS switches (FO2, FO3/TEST) are supplied by
VSHS
Config &
Control Logic
FOx/
GPIOx
VSHS
Function
Normal Mode
Stop Mode
Sleep Mode
Fail-Safe Mode
FOx
keeps the state
keeps the state
active
WK
wake capable
wake capable
OFF
HS
as configured in Normal Mode
OFF
OFF
LS
as configured in Normal Mode
OFF
OFF
configurable



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