LIS2DS12 datasheet(52/68 Pages) STMICROELECTRONICS

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LIS2DS12

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DocID027753 Rev 4

8.27

INT_DUR (32h)

Interrupt duration register (r/w)

Table 72. INT_DUR register

Table 73. INT_DUR register description

8.28

WAKE_UP_THS (33h)

Wakeup threshold register (r/w)

Table 74. WAKE_UP_THS register

Table 75. WAKE_UP_THS register description

LAT3

LAT2

LAT1

LAT0

QUIET1

QUIET0

SHOCK1

SHOCK0

LAT [3:0]

Duration of maximum time gap for double-tap recognition. When double-tap

recognition is enabled, this register expresses the maximum time between two

successive detected taps to determine a double-tap event.

1 LSB = 32 TODR.

QUIET [1:0]

Expected quiet time after a tap detection: this register represents the time after

the first detected tap in which there must not be any over-threshold event.

1 LSB = 4 TODR.

SHOCK [1:0]

Maximum duration of over-threshold event: this register represents the maximum

time of an over-threshold signal detection to be recognized as a tap event.

1 LSB = 8 TODR

SINGLE_

DOUBLE_

TAP

SLEEP_

WU_

THS_ 5

WU_

THS_4

WU_

THS_3

WU_

THS 2

WU_

THS 1

WU_

THS 0

SINGLE_

DOUBLE_

TAP

Single/double-tap enable

(0: single-tap is enabled; 1: double-tap is enabled)

SLEEP_ON

Sleep (inactivity) enable

(0: sleep disabled; 1: sleep enabled)

WU_THS [5:0]

Wakeup threshold, 6-bit unsigned 1 LSB = 1/64 of FS

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