LIS2DS12 datasheet(53/68 Pages) STMICROELECTRONICS

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LIS2DS12

8.29

WAKE_UP_DUR (34h)

Wakeup and sleep duration configuration register (r/w)

Table 76. WAKE_UP_DUR register

Table 77. WAKE_UP_DUR register description

8.30

FREE_FALL (35h)

Free-fall duration and threshold configuration register (r/w)

Table 78. FREE_FALL register

Table 79. FREE_FALL register description

Table 80. FREE_FALL threshold decoding @ 2 g FS

FF_DUR5 WU_DUR1 WU_DUR0

INT1_

FSS7

SLEEP_

DUR3

SLEEP_

DUR2

SLEEP_

DUR1

SLEEP_

DUR0

FF DUR5

Free-fall duration. In conjunction with FF_DUR [4:0] bit in FREE_FALL (35h)

WU_DUR [1:0]

Wakeup duration. 1 LSB = 1 TODR

INT1_FSS7

FIFO flag FSS7 is routed on INT1 pad

(0: disabled; 1: enabled)

SLEEP_DUR [3:0]

Duration to go in sleep mode. 1 LSB = 512 TODR

FF_DUR4 FF_DUR3 FF_DUR2 FF_DUR1 FF_DUR0

FF_THS2

FF_THS1

FF_THS0

FF_DUR [4:0]

Free-fall duration. In conjunction with FF_DUR5 bit in WAKE_UP_DUR (34h)

FF_THS [2:0]

Free-fall threshold @ FS=2 g (refer to Table 80)

FF_THS1

FF_THS0

Threshold decoding (LSB)

000

001

010

011

100

101

110

111

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