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CP3SP33SMS/NOPB Datasheet(PDF) 37 Page - Texas Instruments |
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CP3SP33SMS/NOPB Datasheet(HTML) 37 Page - Texas Instruments |
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37 / 407 page  CP3SP33 www.ti.com SNOSCW5 – MAY 2013 Table 9-4. ASC DMA Channel Assignment CHANNEL R/W PERIPHERAL REGISTER 0 R UART3 RXBUF3 1 W UART3 TXBUF3 2 R CVSD/PCM0 PCMOUT0 3 W CVSD/PCM0 PCMIN0 4 R CVSD/PCM1 PCMOUT1 5 W CVSD/PCM1 PCMIN1 6 R AAI Slot 0 ARDR0 7 W AAI Slot 0 ATDR0 8 R AAI Slot 1 ARDR1 9 W AAI Slot 1 ATDR1 10 R Codec ADC1 TCDCADC1 11 R Codec ADC2 TCDCADC2 12 W Codec Left DAC TCDCLEFT 13 W Codec Right DAC TCDCRIGHT 14 R I2S Left I2SRXDATALEFT 15 R I2S Right I2SRXDATARIGHT 16 W I2S Left I2STXDATALEFT 17 W I2S Right I2STXDATARIGHT 18 R MWSPI1 MWDAT 19 W MWSPI1 MWDAT 20 R/W ACB1 ACB1SDA 9.3 DSP and ASC Registers The DSP and ASC registers control and provide status for the interface between the CPU and the DSP. The DSP and ASC registers are listed in Table 9-5. Table 9-5. DSP and ASC Registers NAME ADDRESS DESCRIPTION ADMAC FF 6820h ASC DSP Control Register ADMAS FF 681Ch ASC DSP Status Register PDATA FF EC00h DSP DMA Channel 0 Data Register PADR FF EC04h DSP DMA Channel 0 Address Register PCFG FF EC08h CPU/DSP Interface Configuration Register PSTS FF EC0Ch CPU/DSP Interface Status Register PSEM FF EC10h CPU-to-DSP Semaphore Register PMASK FF EC14h CPU Interrupt Mask Register PCLEAR FF EC18h CPU-to-DSP Semaphore Clear Register APBP_SEM FF EC1Ch DSP-to-CPU Semaphore Register APBP_COM0 FF EC20h CPU-to-DSP Command Register 0 APBP_REP0 FF EC24h DSP-to-CPU Reply Register 0 APBP_COM1 FF EC28h CPU-to-DSP Command Register 1 APBP_REP1 FF EC2Ch DSP-to-CPU Reply Register 1 APBP_COM2 FF EC30h CPU-to-DSP Command Register 2 APBP_REP2 FF EC34h DSP-to-CPU Reply Register 2 ASCDMASEL0 FF 6800h ASC DMA Controller Select Register 0 ASCDMASEL1 FF 6804h ASC DMA Controller Select Register 1 Copyright © 2013, Texas Instruments Incorporated DSP and Audio Peripherals 37 Submit Documentation Feedback Product Folder Links :CP3SP33 |
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