CP3SP33SMSSLASHNOPB datasheet(50/407 Pages) TI1

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CP3SP33

SNOSCW5 – MAY 2013

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10.4.3 Mask Register n (SMSKRn)

The SMSKRn registers are 32-bit, read/write registers that specify timing parameters, memory type, and

memory size for the chip selects. At reset, the SMSKR0 register is initialized to 0000 0028h, SMSKR1 is

initialized to 0000 0128h, and SMSKR2 is initialized to 0000 0229h. The register format is shown below.

11M M10

8M M7

5M M4

Reserved

REG_SEL

MEM_TYPE

MEM_SIZE

The Memory SIze field specifies the size of the external memory device. Values of 12h to

1Fh are reserved.

00000 – No memory connected.

00001 – 64K bytes.

00010 – 128K bytes.

00011 – 256K bytes.

00100 – 512K bytes.

00101 – 1M bytes.

00110 – 2M bytes.

00111 – 4M bytes.

01000 – 8M bytes.

01001 – 16M bytes.

01010 – 32M bytes.

01011 – 64M bytes.

01100 – 128M bytes.

01101 – 256M bytes.

01110 – 512M bytes.

01111 – 1G bytes.

10000 – 2G bytes.

10001 – 4G bytes

MEM_TYPE

The Memory Type field specifies the type of external memory device.

000 – Reserved.

001 – RAM.

010 – Flash memory.

011 – ROM.

REG_SEL

The Register Select field specifies timing parameters in one of the three SMTMGR_SETn

registers to be used with the external memory device.

000 – SMTMGR_SET0 register.

001 – SMTMGR_SET1 register.

010 – SMTMGR_SET2 register.

External Bus Interface Unit

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