TMS320DM814X datasheet(181/376 Pages) TI1

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TMS320DM8148, TMS320DM8147

www.ti.com

SPRS647E – MARCH 2011 – REVISED DECEMBER 2013

Power, Reset, Clocking, and Interrupts

7.1

Power, Reset and Clock Management (PRCM) Module

The PRCM module is the centralized management module for the power, reset, and clock control signals

of the device. The PRCM interfaces with all the components on the device for power, clock, and reset

management

through

power-control

signals.

The

PRCM

module

inTiming

Requirements

for

AUD_CLKINxtegrates enhanced features to allow the device to adapt energy consumption dynamically,

according to changing application and performance requirements. The innovative hardware architecture

allows a substantial reduction in leakage current.

The PRCM module is composed of two main entities:

•

Power reset manager (PRM): Handles the power, reset, wake-up management, and system clock

source control (oscillator)

•

Clock manager (CM): Handles the clock generation, distribution, and management.

For more details on the PRCM, see the Power, Reset, and Clock Management (PRCM) Module chapter of

the TMS320DM814x DaVinci Digital Media Processors Technical Reference Manual (Literature Number:

SPRUGZ8).

7.2

Power

7.2.1

Voltage and Power Domains

Every Module within the device belongs to a Core Logic Voltage Domain, Memory Voltage Domain, and a

Power Domain (see Table 7-1).

Table 7-1. Voltage and Power Domains

CORE LOGIC

MEMORY VOLTAGE

POWER

MODULES

VOLTAGE DOMAIN

DOMAIN

ARM_L

ARM_M

ARM Cortex-A8 Subsystem

DCAN0/1, DMM, EDMA, ELM, DDR0/1, EMAC Switch,

GPIO Banks 0/1/2/3,GPMC, I2C0/1/2/3, IPC,

MCASP0/1/2/3/4/5, MCBSP, OCMC SRAM, PCIE,

ALWAYS ON

CORE_L

CORE_M

PRCM, RTC, SATA, SD/MMC0/1/2, SPI01/2/3,

Timer1/2/3/4/5/6/7/8, UART0/1/2/3/4/5, USB0/1,

WDT0, System Interconnect, JTAG, Media Controller,

ISS

GFX

SGX530

HDVPSS

HDVPSS, HDMI, SD-DAC

DSP_L

DSP_M

DSP

C674x DSP and L2 SRAM

HDVICP_L

HDVICP_M

HDVICP

HDVICP2

7.2.1.1

Core Logic Voltage Domains

The device contains four Core Logic Voltage Domains. These domains define groups of Modules that

share the same supply voltage for their core logic. Each Core Logic Voltage Domain is powered by a

dedicated supply voltage rail. Table 7-2 shows the mapping between the Core Logic Voltage Domains and

their associated supply pins.

Power, Reset, Clocking, and Interrupts

181

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