M38B53M4-059FP datasheet(4/355 Pages) MITSUBISHI

4 / 355 page

BEFORE USING THIS USER’S MANUAL

This user’s manual consists of the following three chapters. Refer to the chapter appropriate to your conditions,

such as hardware design or software development.

1. Organization

q CHAPTER 1 HARDWARE

This chapter describes features of the microcomputer and operation of each peripheral function.

q CHAPTER 2 APPLICATION

This chapter describes usage and application examples of peripheral functions, based mainly on

setting examples of relevant registers.

q CHAPTER 3 APPENDIX

This chapter includes a list of registers, and necessary information for systems development using

the microcomputer, the mask ROM confirmation (for mask ROM version), ROM programming confirmation,

and the mark specifications which are to be submitted when ordering.

2. Structure of Register

The figure of each register structure describes its functions, contents at reset, and attributes as follows:

2: Bit attributes••••••The attributes of control register bits are classified into 3 bytes : read-only, write-only

and read and write. In the figure, these attributes are represented as follows :

: Bit in which nothing is arranged

Name

Functions

At reset

Contents immediately after reset release

Bit attributes

(Note 1)

0 0 : Single-chip mode

0 1 :

1 0 :

1 1 :

Processor mode bits

Stack page selection bit

Nothing arranged for these bits. These are write disabled

bits. When these bits are read out, the contents are “0.”

Fix this bit to “0.”

Main clock division ratio selection

bits

Not available

b1 b0

0 : 0 page

1 : 1 page

0 0 :

φ = XIN/2 (High-speed mode)

0 1 :

φ = XIN/8 (Middle-speed mode)

1 0 :

φ = XIN/8 (Middle-speed mode)

1 1 :

φ = XIN (Double-speed mode)

: Bit that is not used for control of the corresponding function

Notes 1: Contents immediately after reset release

0••••••“0” at reset release

1••••••“1” at reset release

Undefined••••••Undefined or reset release

••••••Contents determined by option at reset release

R••••••Read

••••••Read enabled

!••••••Read disabled

W••••••Write

••••••Write enabled

! ••••••Write disabled

(Note 2)

CPU mode register (CPUM) [Address : 3B 16]

Bits

b7 b6

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