M38B53M4-059FP datasheet(86/355 Pages) MITSUBISHI

86 / 355 page

1-70

38B5 Group User’s Manual

HARDWARE

FUNCTIONAL DESCRIPTION SUPPLEMENT

Timing After Interrupt

The interrupt processing routine begins with the machine cycle fol-

lowing the completion of the instruction that is currently in execution.

Figure 78 shows a timing chart after an interrupt occurs, and Figure

79 shows the time up to execution of the interrupt processing routine.

Fig. 78 Timing chart after interrupt occurs

Fig. 79 Time up to execution of interrupt processing routine

PCH

PCL

PSAL

S, SPSS-2, SPS

S-1, SPS

AL, AH

Address bus

Data bus

Not used

: CPU operation code fetch cycle

(This is an internal signal which cannot be observed from the external unit.)

: Vector address of each interrupt

: Jump destination address of each interrupt

: “0016” or “0116”

SYNC

BL, BH

AL, AH

SPS

SYNC

7 to 23 cycles (4 MHz, 1.75

µs to 5.75 µs)

Interrupt request occurs

Main routine

Interrupt processing routine

2 cycles5 cycles

Waiting time for

pipeline post-

processing

Push onto

stack vector

fetch

Interrupt operation starts

0 to 16 cycles

M38B53M4-059FP Datasheet(PDF) 86 Page - Mitsubishi Electric Semiconductor

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