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TMS320DM814X Datasheet(PDF) 230 Page - Texas Instruments |
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TMS320DM814X Datasheet(HTML) 230 Page - Texas Instruments |
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230 / 377 page  TMS320DM8148, TMS320DM8147 SPRS647E – MARCH 2011 – REVISED DECEMBER 2013 www.ti.com Table 8-5. EDMA Channel Controller (EDMA TPCC) Control Registers (continued) HEX ADDRESS ACRONYM REGISTER NAME 0x4900 2084 QEER QDMA Event Enable 0x4900 2088 QEECR QDMA Event Enable Clear 0x4900 208C QEESR QDMA Event Enable Set 0x4900 2090 QSER QDMA Secondary Event 0x4900 2094 QSECR QDMA Secondary Event Clear 0x4900 2200 - 0x4900 2294 - Shadow Region 1 Channels 0x4900 2400 - 0x4900 2494 - Shadow Region 2 Channels ... ... 0x4900 2E00 - 0x4900 2E94 - Shadow Channels for MP Space 7 Table 8-6. EDMA Transfer Controller (EDMA TPTC) Control Registers TPTC0 HEX TPTC1 HEX TPTC2 HEX TPTC3 HEX ACRONYM REGISTER NAME ADDRESS ADDRESS ADDRESS ADDRESS 0x4980 0000 0x4990 0000 0x49A0 0000 0x49B0 0000 PID Peripheral Identification 0x4980 0004 0x4990 0004 0x49A0 0004 0x49B0 0004 TCCFG EDMA3TC Configuration 0x4980 0100 0x4990 0100 0x49A0 0100 0x49B0 0100 TCSTAT EDMA3TC Channel Status 0x4980 0120 0x4990 0120 0x49A0 0120 0x49B0 0120 ERRSTAT Error Status 0x4980 0124 0x4990 0124 0x49A0 0124 0x49B0 0124 ERREN Error Enable 0x4980 0128 0x4990 0128 0x49A0 0128 0x49B0 0128 ERRCLR Error Clear 0x4980 012C 0x4990 012C 0x49A0 012C 0x49B0 012C ERRDET Error Details 0x4980 0130 0x4990 0130 0x49A0 0130 0x49B0 0130 ERRCMD Error Interrupt Command 0x4980 0140 0x4990 0140 0x49A0 0140 0x49B0 0140 RDRATE Read Rate Register 0x4980 0240 0x4990 0240 0x49A0 0240 0x49B0 0240 SAOPT Source Active Options 0x4980 0244 0x4990 0244 0x49A0 0244 0x49B0 0244 SASRC Source Active Source Address 0x4980 0248 0x4990 0248 0x49A0 0248 0x49B0 0248 SACNT Source Active Count 0x4980 024C 0x4990 024C 0x49A0 024C 0x49B0 024C SADST Source Active Destination Address 0x4980 0250 0x4990 0250 0x49A0 0250 0x49B0 0250 SABIDX Source Active Source B-Index 0x4980 0254 0x4990 0254 0x49A0 0254 0x49B0 0254 SAMPPRXY Source Active Memory Protection Proxy 0x4980 0258 0x4990 0258 0x49A0 0258 0x49B0 0258 SACNTRLD Source Active Count Reload 0x4980 025C 0x4990 025C 0x49A0 025C 0x49B0 025C SASRCBREF Source Active Source Address B-Reference 0x4980 0260 0x4990 0260 0x49A0 0260 0x49B0 0260 SADSTBREF Source Active Destination Address B-Reference 0x4980 0280 0x4990 0280 0x49A0 0280 0x49B0 0280 DFCNTRLD Destination FIFO Set Count Reload 0x4980 0284 0x4990 0284 0x49A0 0284 0x49B0 0284 DFSRCBREF Destination FIFO Set Destination Address B Reference 0x4980 0288 0x4990 0288 0x49A0 0288 0x49B0 0288 DFDSTBREF Destination FIFO Set Destination Address B Reference 0x4980 0300 0x4990 0300 0x49A0 0300 0x49B0 0300 DFOPT0 Destination FIFO Options 0 0x4980 0304 0x4990 0304 0x49A0 0304 0x49B0 0304 DFSRC0 Destination FIFO Source Address 0 0x4980 0308 0x4990 0308 0x49A0 0308 0x49B0 0308 DFCNT0 Destination FIFO Count 0 0x4980 030C 0x4990 030C 0x49A0 030C 0x49B0 030C DFDST0 Destination FIFO Destination Address 0 0x4980 0310 0x4990 0310 0x49A0 0310 0x49B0 0310 DFBIDX0 Destination FIFO BIDX 0 230 Peripheral Information and Timings Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TMS320DM8148 TMS320DM8147 |
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