TMS320DM814X datasheet(369/377 Pages) TI1

369 / 377 page

VCRS

90% VOH

10% VOL

USBx_DM

USBx_DP

tper − tjr

TMS320DM8148, TMS320DM8147

www.ti.com

SPRS647E – MARCH 2011 – REVISED DECEMBER 2013

8.22.2 USB2.0 Electrical Data/Timing

Table 8-118. Switching Characteristics Over Recommended Operating Conditions for USB2.0

(see Figure 8-96)

OPP100/120/166

LOW SPEED

FULL SPEED

HIGH SPEED

NO.

PARAMETER

UNIT

1.5 Mbps

12 Mbps

480 Mbps

MIN

MAX

MIN

MAX

MIN

MAX

tr(D)

Rise time, USBx_DP and USBx_DM signals(1)

300

0.5

tf(D)

Fall time, USBx_DP and USBx_DM signals (1)

300

0.5

trfM

Rise/Fall time, matching(2)

125

111

–

VCRS

Output signal cross-over voltage(1)

1.3

–

tjr(source)NT

Source (Host) Driver jitter, next transition

(3)

tjr(FUNC)NT

Function Driver jitter, next transition

(3)

tjr(source)PT

Source (Host) Driver jitter, paired transition(4)

(3)

tjr(FUNC)PT

Function Driver jitter, paired transition

(3)

tw(EOPT)

Pulse duration, EOP transmitter

1250

1500

160

175

–

tw(EOPR)

Pulse duration, EOP receiver(5)

670

–

Mbp

t(DRATE)

Data Rate

1.5

480

ZDRV

Driver Output Resistance

–

49.5

40.5

49.5

Ω

ZINP

Receiver Input Impedance(6)

300

–

Ω

(1)

Low Speed: CL = 200 pF, Full Speed: CL = 50 pF, High Speed: CL = 50 pF

(2)

tRFM = (tr/tf) x 100. [Excluding the first transaction from the Idle state.]

(3)

For more detailed information, see the Universal Serial Bus Specification Revision 2.0, Chapter 7, Electrical.

(4)

tjr = tpx(1) - tpx(0)

(5)

Must accept as valid EOP.

(6)

These values do not include the external resistors required per USB 2.0 specification.

Figure 8-96. USB2.0 Integrated Transceiver Interface Timing

For more detailed information on USB2.0 board design, routing, and layout guidelines, see the USB 2.0

Board Design and Layout Guidelines Application Report (Literature Number: SPRAAR7).

Peripheral Information and Timings

369

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