STA450A datasheet(12/66 Pages) STMICROELECTRONICS

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STA450A

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b) Read sequences

1.5 Data Output Port

The STA450A sends data through the Data Port. The Data Port consists of 3 lines: DP_CLK, DP_DATA,

DP_EN. The communication protocol is in burst.

The data changes on the DP_DATA line on the raising edge of the clock line DP_CLK, the DP_EN line defines

when the data is valid; DP_DATA and DP_EN must be sampled on the falling edge of DP_CLK.

The Service Component is output through the Data Port without adding a flag indicating the frame.

The Data Port burst rate is selectable through the XM Stack Command DATAPORT_CH_FREQUENCY (op-

code 0x07) from 1 MHz to 12 MHz, the default rate is 2 MHz.

Figure 7. Data Port Protocol Waveform Diagram

1.6 IEC958 Output (SPDIF)

The SPDIF output is a Fully IEC958 formatted, single ended output for linear PCM output (left and right channel,

16,18, 20 & 24 bits) supporting the Consumer Mode.

ST AR T

SLA VE AD -

DAT A

NM A STO P

S ING LE REA D

ST ART

SL AV E AD DRE SS

FIRST DA TA

ST OP

M ULTI PLE R EA D

SECO ND DA TA

NM A

STA RT

SLA VE AD DRE SS

SU B -AD DRE SS

WSA

COMBI N ED F ORMAT : SU B-ADDRESS + S INGLE READ

DATA FR OM @

STAR

SLA VE AD -

R SA

NM A STO P

STA RT

SL AVE ADDRESS

SU B-AD DRE SS @

SA STA RT

SL AV E AD DRE SS

DA TA FROM @ + 1

DA TA FRO M @

NM A

ST OP

R : R/W BIT = REA D

SA : SLA VE A CKN OW LE DG E

MA : M AS T ER AC K NOWL EDGE

NM A : N O M AST ER A CKN OW LE DG E (LA ST D AT A)

@ : SUB -ADDRESS V AL UE

CO MBINED FO RM AT : SU B-AD D RES S + M ULTIPLE R EA D

DP_DATA

DP_CLK

DP_EN

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