MPC5675KFF0VMS2R datasheet(115/147 Pages) NXP

115 / 147 page

Electrical characteristics

MPC5675K Microcontroller Data Sheet, Rev. 9

NXP Semiconductors

115

Figure 32. External interrupt timing

3.22.5

FlexCAN timing

3.22.6

DSPI timing

3tICYC

SR IRQ edge to edge time1

—6

—

tCYC

1 Applies when IRQ pins are configured for rising edge or falling edge events, but not both.

Table 69. FlexCAN timing

No.

Symbol

Parameter

Conditions

Min

Max

Unit

1fCAN_TX CC FlexCAN design target transmit data rate

—

MBit/s

2fCAN_RX CC FlexCAN design target receive data rate

—

MBit/s

Table 70. DSPI timing

No.

Symbol

Parameter

Conditions

Min

Max

Unit

1tSCK

CC DSPI cycle time

Master (MTFE = 0)

—

Slave (MTFE = 0)

—

Slave receive only mode1

—

2tCSC CC PCS to SCK delay

—

3tASC CC After SCK delay

—

4tSDC CC SCK duty cycle

—

0.4 × tSCK 0.6 × tSCK ns

Table 68. External interrupt timing (GPIO IRQ) (continued)

No.

Symbol

Parameter

Conditions

Min Max Unit

CLKOUT

IRQ

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