MPC8308CVMADDA datasheet(35/95 Pages) NXP

35 / 95 page

MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 4

Freescale Semiconductor

PCI Express

11.3

Clocking Dependencies

The ports on the two ends of a link must transmit data at a rate that is within 600 parts per million (ppm)

of each other at all times. This is specified to allow bit rate clock sources with a ±300 ppm tolerance.

11.4

Physical Layer Specifications

Following is a summary of the specifications for the physical layer of PCI Express on this device. For

further details as well as the specifications of the transport and data link layer please use the PCI Express

Base Specification, Rev. 1.0a.

11.4.1

Differential Transmitter (TX) Output

This table defines the specifications for the differential output at all transmitters (TXs). The parameters are

specified at the component pins.

Table 34. Differential Transmitter (TX) Output Specifications

Parameter

Symbol

Comments

Min

Typical

Max

Units Note

Unit interval

Each UPETX is 400 ps ± 300 ppm. UPETX

does not account for Spread Spectrum

Clock dictated variations.

399.88

400

400.12

Differential peak-to-peak

output voltage

VTX-DIFFp-p

VPEDPPTX = 2*|VTX-D+ - VTX-D-|

0.8

—

1.2

De-Emphasized differential

output voltage (ratio)

VTX-DE-RATIO

Ratio of the VPEDPPTX of the second and

following bits after a transition divided by

the VPEDPPTX of the first bit after a

transition.

–3.0

–3.5

–4.0

Minimum TX eye width

TTX-EYE

The maximum Transmitter jitter can be

derived as TTX-MAX-JITTER = 1 -

UPEEWTX= 0.3 UI.

0.70

—

2, 3

Maximum time between the

jitter median and maximum

deviation from the median

TTX-EYE-MEDIAN-to-

MAX-JITTER

Jitter is defined as the measurement

variation of the crossing points

(VPEDPPTX = 0 V) in relation to a

recovered TX UI. A recovered TX UI is

calculated over 3500 consecutive unit

intervals of sample data. Jitter is

measured using all edges of the 250

consecutive UI in the center of the 3500

UI used for calculating the TX UI.

—

0.15

2, 3

D+/D- TX output rise/fall

time

TTX-RISE, TTX-FALL

—

0.125

—

2, 5

RMS AC peak common

mode output voltage

VTX-CM-ACp

VPEACPCMTX = RMS(|VTXD+ + VTXD-|/2 -

VTX-CM-DC)

VTX-CM-DC = DC(avg) of |VTX-D+ +

VTX-D-|/2

——

MPC8308CVMADDA Datasheet(PDF) 35 Page - NXP Semiconductors

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