NRF9160-SIBA-R datasheet(49/400 Pages) NORDIC

49 / 400 page

Power and clock management

The nRF9160 provides a feature to be able disable power throughout the entire device externally. This

can be useful when the device is operating as slave processor where it does not need to be powered on

at all times, then it is possible to avoid unnecesary current leaking by driving the ENABLE pin to low. The

nRF9160 will not start if is not enabled. Moreover, a change from disable to enable, will result in a power-

on-reset behavior inside the device.

Note: VDD_GPIO input must be driven low when device is disabled, failing to do so could result in

increased leakage. For more information, see VDD_GPIO considerations in Operating conditions on

page 391.

Note: In case the System Disabled mode is not used, ENABLE must be connected to VDD.

Pin Value

Power status

description

Low

Disabled

Device's internal power regulator disabled

High

Enabled

Device's internal power regulator enabled

Table 16: ENABLE pin configuration

5.1.1.2 System OFF mode

System OFF is the deepest internal power saving mode the system can enter.

In this mode, the core system functionality is powered down and ongoing tasks terminated, and only the

reset and the wakeup functions are available and responsive.

The device is put into System OFF mode using the REGULATORS register interface. When in System OFF

mode, one of the following signals/actions will wake up the device:

1. DETECT signal, generated by the GPIO peripheral

2. RESET

3. start of debug session

When the device wakes up from System OFF mode, a system reset is performed.

One or more RAM blocks can be retained in System OFF mode depending on the settings in the

RAM[n].POWER registers in VMC. RAM[n].POWER are retained registers, see Reset behavior on page

57. Note that these registers are usually overwritten by the startup code provided with the nRF

application examples.

Before entering System OFF mode, the user must make sure that all on-going EasyDMA transactions have

completed. This can be accomplished by making sure that EasyDMA enabled peripherals have stopped and

END events from them received. The LTE modem also needs to be stopped, by issuing a command through

the modem API, before entering System OFF mode. Once the command is issued, one should wait for the

modem to respond that it actually has stopped, as there may be a delay until modem is disconnected from

the network.

5.1.1.2.1 Emulated System OFF mode

If the device is in debug interface mode, System OFF will be emulated to secure that all required resources

needed for debugging are available during System OFF.

See Overview on page 369 chapter for more information. Required resources needed for debugging

include the following key components: Overview on page 369, CLOCK — Clock control on page 70,

POWER — Power control on page 64, NVMC — Non-volatile memory controller on page 29, CPU on

page 20, flash, and RAM. Since the CPU is kept on in emulated System OFF mode, it is required to add an

infinite loop directly after entering System OFF, to prevent the CPU from executing code that normally

should not be executed.

4418_1315 v2.0

NRF9160-SIBA-R Datasheet(PDF) 49 Page - Nordic Semiconductor

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