STM32U5A5QJ datasheet(335/382 Pages) STMICROELECTRONICS

335 / 382 page

DS13543 Rev 1

335/382

STM32U5Axxx

Electrical characteristics

348

CMD, D inputs (referenced to CK) in SD default mode

tISU

Input setup time SD

3.5

tIH

Input hold time SD

1.5

CMD, D outputs (referenced to CK) in SD default mode

tOV

Output valid default time SD

1.5

tOH

Output hold default time SD

0.5

1. Evaluated by characterization. Not tested in production.

2. In SD/e.MMC DDR mode, the clock OSPEEDRy[1:0] is set to 01 while data OSPEEDRy[1:0] remains at 10.

3. With capacitive load CL = 20 pF.

4. For SD 1.8 V support, an external voltage converter is needed.

5. Minimum window of time where the data needs to be stable for proper sampling in tuning mode.

6. tOV = 7.5 ns for SDMMC1 and tOV = 8.5 ns for SDMMC2.

Table 142. SD/e•MMC characteristics (VDD = 2.7 V to 3.6 V)(1)(2) (continued)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Table 143. e•MMC characteristics (VDD = 1.71 V to 1.9 V)(1)(2)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

fPP

Clock frequency in data transfer mode

All modes

except DDR

MHz

DDR mode

40(3)

tW(CKL)

Clock low time

fPP = 52 MHz

8.5

9.5

tW(CKH)

Clock high time

fPP = 52 MHz

8.5

9.5

CMD, D inputs (referenced to CK) in e•MMC mode

tISU

Input setup time HS

tIH

Input hold time HS

tIDW(4)

Input valid window (variable window)

CMD, D outputs (referenced to CK) in e•MMC mode

tOV

Output valid time HS

14/16(5)

tOH

Output hold time HS

1. Evaluated by characterization. Not tested in production.

2. With capacitive load CL = 20 pF.

3. For DDR mode, the maximum frequency is 40 MHz and HSLV must be OFF.

4. Minimum window of time where the data needs to be stable for proper sampling in tuning mode.

5. tOV = 14 ns for SDMMC1 and tOV = 16 ns for SDMMC2.

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