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DSP56321RM/D Datasheet(PDF) 16 Page - NXP Semiconductors

Part # DSP56321RM/D
Description  24-Bit Digital Signal Processor
PDF  88 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

DSP56321RM/D Datasheet(HTML) 16 Page - NXP Semiconductors

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1-10
Host Interface (HI08)
HRW
HRD/HRD
PB11
Input
Input
Input or Output
Ignored Input
Host Read/Write—When the HI08 is programmed to interface
with a single-data-strobe host bus and the HI function is selected,
this signal is the Host Read/Write (HRW) input.
Host Read Data—When the HI08 is programmed to interface with
a double-data-strobe host bus and the HI function is selected, this
signal is the HRD strobe Schmitt-trigger input. The polarity of the
data strobe is programmable but is configured as active-low (HRD)
after reset.
Port B 11—When the HI08 is configured as GPIO through the
HI08 Port Control Register, this signal is individually programmed
as an input or output through the HI08 Data Direction Register.
HDS/HDS
HWR/HWR
PB12
Input
Input
Input or Output
Ignored Input
Host Data Strobe—When the HI08 is programmed to interface
with a single-data-strobe host bus and the HI function is selected,
this signal is the host data strobe (HDS) Schmitt-trigger input. The
polarity of the data strobe is programmable but is configured as
active-low (HDS) following reset.
Host Write Data—When the HI08 is programmed to interface with
a double-data-strobe host bus and the HI function is selected, this
signal is the host write data strobe (HWR) Schmitt-trigger input.
The polarity of the data strobe is programmable but is configured
as active-low (HWR) following reset.
Port B 12—When the HI08 is configured as GPIO through the
HI08 Port Control Register, this signal is individually programmed
as an input or output through the HI08 Data Direction Register.
HREQ/HREQ
HTRQ/HTRQ
PB14
Output
Output
Input or Output
Ignored Input
Host Request—When the HI08 is programmed to interface with a
single host request host bus and the HI function is selected, this
signal is the host request (HREQ) output. The polarity of the host
request is programmable but is configured as active-low (HREQ)
following reset. The host request may be programmed as a driven
or open-drain output.
Transmit Host Request—When the HI08 is programmed to
interface with a double host request host bus and the HI function is
selected, this signal is the transmit host request (HTRQ) output.
The polarity of the host request is programmable but is configured
as active-low (HTRQ) following reset. The host request may be
programmed as a driven or open-drain output.
Port B 14—When the HI08 is configured as GPIO through the
HI08 Port Control Register, this signal is individually programmed
as an input or output through the HI08 Data Direction Register.
Table 1-10. Host Interface (Continued)
Signal Name
Type
State During
Reset1,2
Signal Description
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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