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DSP56321RM/D Datasheet(PDF) 62 Page - NXP Semiconductors |
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DSP56321RM/D Datasheet(HTML) 62 Page - NXP Semiconductors |
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62 / 88 page  3-6 FC-PBGA Package Description L11 GND M13 A1 P1 NC L12 VCCA M14 A2 P2 H5, HAD5, or PB5 L13 A3 N1 H6, HAD6, or PB6 P3 H3, HAD3, or PB3 L14 A4 N2 H7, HAD7, or PB7 P4 H1, HAD1, or PB1 M1 HA1, HA8, or PB9 N3 H4, HAD4, or PB4 P5 NC M2 HA2, HA9, or PB10 N4 H2, HAD2, or PB2 P6 GND M3 HA0, HAS/HAS, or PB8 N5 RESET P7 AA2 M4 VCCH N6 GND P8 XTAL M5 H0, HAD0, or PB0 N7 AA3 P9 VCCC M6 VCCQL N8 NC P10 TA M7 VCCQH N9 VCCQL P11 BB M8 EXTAL N10 Reserved P12 AA1 M9 Reserved N11 BR P13 BG M10 NC N12 VCCC P14 NC M11 WR N13 AA0 M12 RD N14 A0 Note: Signal names are based on configured functionality. Most connections supply a single signal. Some connections provide a signal with dual functionality, such as the MODx/IRQx pins that select an operating mode after RESET is deasserted but act as interrupt lines during operation. Some signals have configurable polarity; these names are shown with and without overbars, such as HAS/HAS. Some connections have two or more configurable functions; names assigned to these connections indicate the function for a specific configuration. For example, connection N2 is data line H7 in non-multiplexed bus mode, data/address line HAD7 in multiplexed bus mode, or GPIO line PB7 when the GPIO function is enabled for this pin. Unlike the TQFP package, most of the GND pins are connected internally in the center of the connection array and act as heat sink for the chip. Therefore, except for GNDP and GNDP1 that support the PLL, other GND signals do not support individual subsystems in the chip. Table 3-1. Signal List by Ball Number (Continued) Ball No. Signal Name Ball No. Signal Name Ball No. Signal Name Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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