HC705E5GRSSLASHD datasheet(21/148 Pages) NXP

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General Description

Functional Pin Description

MC68HC705E5 — Rev. 1.0

General Release Specification

General Description

1.5.1 V

and V

Power is supplied to the microcontroller using these two pins. V

DD is the

positive supply and V

SS is ground.

1.5.2 IRQ/VPP

This pin is used to supply the EPROM with the required programming

voltage. In addition, the mask interrupt request has a programmable

option that provides two different choices of interrupt triggering

sensitivity. The options are:

1. Negative edge-sensitive triggering only

2. Both negative edge-sensitive and level-sensitive triggering

The MCU completes the current instruction before it responds to the

interrupt request. When IRQ/VPP goes low for at least one tILIH, a logic

1 is latched internally to signify an interrupt has been requested. When

the MCU completes its current instruction, the interrupt latch is tested. If

the interrupt latch contains a logic 1, and the interrupt mask bit (I bit) in

the condition code register is clear, the MCU then begins the interrupt

sequence.

If the option is selected to include level-sensitive triggering, the IRQ input

requires an external resistor to VDD for wired-OR operation.

The IRQ/VPP pin contains an internal Schmitt trigger as part of its input

to improve noise immunity. Refer to Section 4. Interrupts for more

detail.

NOTE:

The voltage on the IRQ pin affects the mode of operation. For additional

information, see Section 6. Operating Modes.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

HC705E5GRS/D Datasheet(PDF) 21 Page - NXP Semiconductors