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HC705E5GRS/D Datasheet(PDF) 32 Page - NXP Semiconductors

Part # HC705E5GRS/D
Description  General Release Specification
PDF  148 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

HC705E5GRS/D Datasheet(HTML) 32 Page - NXP Semiconductors

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Central Processing Unit (CPU)
General Release Specification
MC68HC705E5 — Rev. 1.0
Central Processing Unit (CPU)
3.6 Stack Pointer
The stack pointer contains the address of the next free location on the
stack. During an MCU reset or the reset stack pointer (RSP) instruction,
the stack pointer is set to location $00FF. The stack pointer then is
decremented as data is pushed onto the stack and incremented as data
is pulled from the stack.
When accessing memory, the seven most significant bits (MSB) are
permanently set to 0000011. These seven bits are appended to the six
least significant register bits to produce an address within the range of
$00FF to $00C0. Subroutines and interrupts may use up to 64 (decimal)
locations. If 64 locations are exceeded, the stack pointer wraps around
and loses the previously stored information. A subroutine call occupies
two locations on the stack; an interrupt uses five locations.
3.7 Program Counter
The program counter is a 13-bit register that contains the address of the
next byte to be fetched.
NOTE:
The HC05 CPU core is capable of addressing 16-bit locations. For this
implementation, however, the addressing registers are limited to an
8-Kbyte memory map.
Bit
12
11
10
987654321
Bit
0
0
0
0001
SP
Figure 3-6. Stack Pointer (SP)
Bit
12
11
10
987654321
Bit
0
PC
Figure 3-7. Program Counter (PC)
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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