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PIC18F6310E/PTSQTP Datasheet(PDF) 64 Page - Microchip Technology |
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PIC18F6310E/PTSQTP Datasheet(HTML) 64 Page - Microchip Technology |
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64 / 404 page ![]() PIC18F6310/6410/8310/8410 DS39635A-page 62 Preliminary 2004 Microchip Technology Inc. 5.1.1 PIC18F8310/8410 PROGRAM MEMORY MODES In addition to available on-chip FLASH program memory, 80-pin devices in this family can also address up to 2 Mbytes of external program memory through an external memory interface. There are four distinct operating modes available to the controllers: • Microprocessor (MP) • Microprocessor with Boot Block (MPBB) • Extended Microcontroller (EMC) • Microcontroller (MC) The program memory mode is determined by setting the two Least Significant bits of the CONFIG3L config- uration byte, as shown in Register 5-1. (See also Section 23.1 “Configuration Bits” for additional details on the device configuration bits.) The program memory modes operate as follows: •The Microcontroller Mode accesses only on-chip Flash memory. Attempts to read above the physical limit of the on-chip Flash (3FFFh) causes a read of all ‘0’s (a NOP instruction). The Microcontroller mode is also the only operating mode available to PIC18F6310 and PIC18F6410 devices. •The Extended Microcontroller Mode allows access to both internal and external program memories as a single block. The device can access its entire on-chip Flash memory; above this, the device accesses external program memory up to the 2-Mbyte program space limit. As with Boot Block mode, execution automatically switches between the two memories as required. •The Microprocessor Mode permits access only to external program memory; the contents of the on-chip Flash memory is ignored. The 21-bit program counter permits access to the entire 2-Mbyte linear program memory space. • The Microprocessor with Boot Block Mode accesses on-chip Flash memory from addresses 000000h to 0007FFh. Above this, external program memory is accessed all the way up to the 2-Mbyte limit. Program execution automatically switches between the two memories as required. In all modes, the microcontroller has complete access to data RAM. Figure 5-2 compares the memory maps of the different program memory modes. The differences between on-chip and external memory access limitations are more fully explained in Table 5-1. REGISTER 5-1: CONFIG3L: CONFIGURATION BYTE REGISTER 3 LOW R/P-1 R/P-1 U-0 U-0 U-0 U-0 R/P-1 R/P-1 WAIT BW — — — —PM1 PM0 bit 7 bit 0 bit 7 WAIT: External Bus Data Wait Enable bit 1 = Wait selections unavailable, device will not wait 0 = Wait programmed by WAIT1 and WAIT0 bits of MEMCOM register (MEMCOM<5:4>) bit 6 BW: External Bus Data Width Select bit 1 = 16-bit external bus data width 0 = 8-bit external bus data width bit 5-2 Unimplemented: Read as ‘0’ bit 1-0 PM1:PM0: Processor Data Memory Mode Select bits 11 = Microcontroller mode 10 = Microprocessor mode(1) 01 = Microcontroller with Boot Block mode(1) 00 = Extended Microcontroller mode(1) Note 1: This mode is available only on PIC18F8410 devices. Legend: R = Readable bit P = Programmable bit U = Unimplemented bit, read as ‘0’ -n = Value after erase ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown |
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