HD404828RFS datasheet(76/149 Pages) RENESAS

Part #	HD404828RFS

Description	AS Microcomputer Incorporating a LCD controller/Driver Circuit

PDF	149 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

Logo

76 / 149 page

HD404829R Series

• Input capture timer operation: The input capture timer counts the clock cycles between trigger edges

input to pin EVND.

Either falling or rising edge, or both falling and rising edges of input signals can be selected as the

trigger input edge by detection edge select register 2 (ESR2: $027).

When a trigger edge is input to EVND, the count of timer D is written to timer read register D (TRDL:

$011, TRDU: $012), and the timer D interrupt request flag (IFTD: $003, bit 0) and the input capture

status flag (ICSF: $021, bit 0) are set. Timer D is reset to $00, and then incremented again. While

ICSF is set, if a trigger input edge is applied to timer D, or if timer D generates an overflow, the input

capture error flag (ICEF: $021, bit 1) is set. ICSF and ICEF are reset to 0 by MCU reset or by writing

By selecting the input capture operation, pin R12/TOD is set to R12 and timer D is reset to $00.

HD404828RFS Datasheet(PDF) 76 Page - Renesas Technology Corp