HD404828RFS datasheet(20/149 Pages) RENESAS

20 / 149 page

HD404829R Series

SPX Register (SPX) and SPY Register (SPY)

The SPX and SPY registers are 4-bit registers used to supplement the X and Y registers.

Carry Flag (CA)

CA is a 1-bit flag that stores ALU overflow generated by an arithmetic operation. CA is set to 1 when an

overflow is generated, and is cleared to 0 after operations in which no overflow occurred. CA is also

affected by the carry set/carry clear instructions (SEC and REC), and by the rotate with carry instructions

(ROTL and ROTR.)

During interrupt handling, CA is saved on the stack, and is restored from the stack by the RTNI instruction.

Status Flag (ST)

ST is a 1-bit flag that stores the results of arithmetic instructions, compare instructions, and bit test

instructions, and is used as the branch condition for the BR, BRL, CAL, and CALL conditional branch

instructions.

The contents of the ST flag are held until the next arithmetic, compare, bit test, or conditional branch

instruction is executed. After the execution of a conditional branch instruction, the value of ST is set to 1

without regard to the condition.

During interrupt handling, ST is saved on the stack, and is restored from the stack by the RTNI instruction.

Program Counter (PC)

The PC is a 14-bit counter that indicates the ROM address of the next instruction the CPU will execute.

Stack Pointer (SP)

The SP is a 10-bit register that indicates the RAM address of the next stack frame in the stack area.

The SP is initialized to $3FF by a reset. The SP is decremented by 4 by a subroutine call or by interrupt

handling, and is incremented by 4 when the saved data has been restored by a return instruction.

The upper 4 bits of the SP are fixed at 1111; the maximum number of stack levels is thus 16.

In addition to the reset method described above, the SP can also be initialized to $3FF by clearing the reset

stack pointer (RSP) in the interrupt control bits area with a RAM bit manipulation instruction, i.e., REM or

REMD.

Reset

The MCU is reset by inputting a high-level voltage to the RESET pin. At power-on or when stop mode is

cancelled, RESET must be high for at least one tRC to enable the oscillator to stabilize. During operation,

RESET must be high for at least two instruction cycles.

Initial values after MCU reset are listed in table 1.

HD404828RFS Datasheet(PDF) 20 Page - Renesas Technology Corp