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HD404828RFS Datasheet(PDF) 80 Page - Renesas Technology Corp |
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HD404828RFS Datasheet(HTML) 80 Page - Renesas Technology Corp |
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80 / 149 page ![]() HD404829R Series 78 • Timer mode register D2 (TMD2: $015): Four-bit read/write register that selects the timer D output mode and input capture operation as shown in figure 64. It is reset to $0 by MCU reset. • Timer write register D (TWDL: $011, TWDU: $012): Write-only register consisting of the lower digit (TWDL) and the upper digit (TWDU). The operation of timer write register D is basically the same as that of timer write register B (TWBL: $00A, TWBU: $00B). • Timer read register D (TRDL: $011, TRDU: $012): Read-only register consisting of the lower digit (TRDL) and the upper digit (TRDU). The operation of timer read register D is basically the same as that of timer read register B (TRBL: $00A, TRBU: $00B). When the input capture timer operation is selected and if the count of timer D is read after a trigger is input, either the lower or upper digit can be read first. • Port mode register C (PMRC: $025): Write-only register that selects R2 0/EVND pin function as shown in figure 53. It is reset to $0 by MCU reset. • Detection edge select register 2 (ESR2: $027): Write-only register that selects the detection edge of signals input to pin EVND as shown in figure 69. It is reset to $0 by MCU reset. Bit Initial value Read/Write Bit name 3 0 R/W TMD23 2 0 R/W TMD22 0 0 R/W TMD20 1 0 R/W TMD21 Timer mode register D2 (TMD2: $015) TMD22 TMD20 0 1 0 1 0 1 0 1 TMD21 0 1 0 1 0 1 R12/TOD mode selection R12 TOD TOD TOD — TOD R12 R12 port Toggle output 0 output 1 output Not used PWM output Input capture (R12 port) TMD23 0 1 !! ! ! : Don’t care Figure 64 Timer Mode Register D2 (TMD2) |
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