MC908QT4MPE datasheet(116/184 Pages) FREESCALE

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System Integration Module (SIM)

MC68HC908QY/QT Family Data Sheet, Rev. 5

116

Freescale Semiconductor

The SIM counter is held in reset from the execution of the STOP instruction until the beginning of stop

recovery. It is then used to time the recovery period. Figure 13-17 shows stop mode entry timing and

Figure 13-18 shows the stop mode recovery time from interrupt or break.

NOTE

To minimize stop current, all pins configured as inputs should be driven to

a logic 1 or logic 0.

Figure 13-17. Stop Mode Entry Timing

Figure 13-18. Stop Mode Recovery from Interrupt

13.8 SIM Registers

The SIM has three memory mapped registers. Table 13-4 shows the mapping of these registers.

Table 13-4. SIM Registers

Address

Access Mode

$FE00

BSR

User

$FE01

SRSR

User

$FE03

BFCR

User

STOP ADDR + 1

SAME

ADDRESS BUS

DATA BUS

PREVIOUS DATA

NEXT OPCODE

SAME

STOP ADDR

SAME

R/W

CPUSTOP

NOTE: Previous data can be operand data or the STOP opcode, depending on the last instruction.

BUSCLKX4

INTERRUPT

ADDRESS BUS

STOP + 2

SP – 1

SP – 2

SP – 3

STOP +1

STOP RECOVERY PERIOD

MC908QT4MPE Datasheet(PDF) 116 Page - Freescale Semiconductor, Inc

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