MC908QT4MPE datasheet(115/184 Pages) FREESCALE

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Low-Power Modes

MC68HC908QY/QT Family Data Sheet, Rev. 5

Freescale Semiconductor

115

A module that is active during wait mode can wake up the CPU with an interrupt if the interrupt is enabled.

Stacking for the interrupt begins one cycle after the WAIT instruction during which the interrupt occurred.

In wait mode, the CPU clocks are inactive. Refer to the wait mode subsection of each module to see if the

module is active or inactive in wait mode. Some modules can be programmed to be active in wait mode.

Wait mode can also be exited by a reset (or break in emulation mode). A break interrupt during wait mode

sets the SIM break stop/wait bit, SBSW, in the break status register (BSR). If the COP disable bit, COPD,

in the configuration register is 0, then the computer operating properly module (COP) is enabled and

remains active in wait mode.

Figure 13-15 and Figure 13-16 show the timing for wait recovery.

Figure 13-15. Wait Recovery from Interrupt

Figure 13-16. Wait Recovery from Internal Reset

13.7.2 Stop Mode

In stop mode, the SIM counter is reset and the system clocks are disabled. An interrupt request from a

module can cause an exit from stop mode. Stacking for interrupts begins after the selected stop recovery

time has elapsed. Reset or break also causes an exit from stop mode.

The SIM disables the oscillator signals (BUSCLKX2 and BUSCLKX4) in stop mode, stopping the CPU

and peripherals. Stop recovery time is selectable using the SSREC bit in the configuration register 1

(CONFIG1). If SSREC is set, stop recovery is reduced from the normal delay of 4096 BUSCLKX4 cycles

down to 32. This is ideal for the internal oscillator, RC oscillator, and external oscillator options which do

not require long start-up times from stop mode.

NOTE

External crystal applications should use the full stop recovery time by

clearing the SSREC bit.

$6E0C

$6E0B

$00FF

$00FE

$00FD

$00FC

$A6

$01

$0B

$6E

$A6

ADDRESS BUS

DATA BUS

EXITSTOPWAIT

NOTE: EXITSTOPWAIT = RST pin OR CPU interrupt OR break interrupt

ADDRESS BUS

DATA BUS

RST

$A6

$6E0B

RSTVCTH

RSTVCTL

$A6

BUSCLKX4

CYCLES

MC908QT4MPE Datasheet(PDF) 115 Page - Freescale Semiconductor, Inc

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