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L6740LTR Datasheet(PDF) 15 Page - STMicroelectronics |
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L6740LTR Datasheet(HTML) 15 Page - STMicroelectronics |
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15 / 44 page ![]() L6740L Device description and operation 15/44 4 Device description and operation L6740L is a hybrid CPU Power Supply Controller compatible with both Parallel (PVI) and Serial (SVI) protocols for AMD K8 - Second Generation Processors. The device provides complete control logic and protections for a high-performance step-down DC-DC voltage regulator, optimized for advanced microprocessor power supply supporting both PVI and SVI communication. It embeds two independent controllers for CPU CORE and the integrated NB, each one with its own set of protections. L6740L is able to detect which kind of CPU is connected in order to configure itself to work as a Single-Plane PVI controller or Dual-Plane SVI controller. The Controller performs a single-phase control for the NB Section and a programmable 2-to- 4 phase control for the CORE Section featuring Dual-Edge non-Latched architecture: this allows fast load-transient response optimizing the output filter consequently reducing the total BOM cost. Further reduction can be achieved by enabling LTB Technology(TM). NB phase (when enabled) will be automatically phase-shifted with respect to the CORE phases in order to reduce the total input rms current amount. PSI_L Flag is sent to the VR through the SVI bus. The controller monitors this flag and selctively modifies the phase number in order to optimize the system efficiency when the CPU enters low-power states. This causes the over-all efficiency to be maximized at light loads so reducing losses and system power consumption. Both sections feature programmable Over-Voltage protection and adjustable constant Over- Current protection. Voltage positioning (LL) is possible thanks to an accurate fully-differential current-sense across the main inductors for the CORE Section and thanks to the loss-less current sense across Low-Side MOSFET RdsON for the NB section. In both cases, LL may be disabled and the generated current information may be used to implement a Load Indica- tor function. L6740L features dual remote sensing for the regulated outputs (CORE and NB) in order to recover from PCB voltage drops also protecting the load from possible feedback network disconnections. LSLess start-up function allows the controller to manage pre-biased start-up avoiding dan- gerous current return through the main inductors as well as negative undershoot on the out- put voltage if the output filter is still charged before start-up. L6740L also supports V_FIX mode for system debugging: in this particular configuration the SVI bus is used as a static bus configuring 4 operative voltages for both the sections and ignoring any serial-VID command. When working in PVI mode, the device features On-the-Fly VID management: VID code is continuously sampled and the reference update according to the variation detected, L6740L is available in TQFP48 Package. |
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