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NRF52820-QDAA-R Datasheet(PDF) 427 Page - Nordic Semiconductor |
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NRF52820-QDAA-R Datasheet(HTML) 427 Page - Nordic Semiconductor |
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427 / 437 page ![]() Hardware and layout Long power supply lines on the PCB should be avoided. All device grounds, VDD connections, and VDD bypass capacitors must be connected as close as possible to the device. For a PCB with a topside RF ground plane, the VSS pins should be connected directly to the ground plane. For a PCB with a bottom ground plane, the best technique is to have via holes as close as possible to the VSS pads. A minimum of one via hole should be used for each VSS pin. Fast switching digital signals should not be routed close to the crystal or the power supply lines. Capacitive loading of fast switching digital output lines should be minimized in order to avoid radio interference. 7.3.6 PCB layout example The PCB layout shown in the following figures is a reference layout for the QFN package with internal LDO setup and VBUS supply. Note: Pay attention to how the capacitor C3 is grounded. It is not directly connected to the ground plane, but grounded via VSS_PA pin 25. This is done to create additional filtering of harmonic components. For all available reference layouts, see the product page for the nRF52820 on www.nordicsemi.com. Figure 153: Top silk layer Figure 154: Top layer 4463_156 v1.0 427 |
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