SPEAR-09-B042 datasheet(21/66 Pages) STMICROELECTRONICS

Part #	SPEAR-09-B042

Description	SPEAr짰 BASIC ARM 926EJ-S core, customizable logic, large IP portfolio SoC

PDF	66 Pages

Scroll/Zoom	100%

Manufacturer	STMICROELECTRONICS [STMicroelectronics]

Direct Link	http://www.st.com

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SPEAR-09-B042

Memory map

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Table 5.

ICM4 – High speed connection

Start address

End address

Peripheral

Notes

Bus

0xE000.0000

0xE07F.FFFF

Reserved

APB

0xE080.0000

0xE0FF.FFFF

Ethernet ctrl

MAC

AHB

0xE100.0000

0xE10F.FFFF

USB2.0 device

FIFO

AHB

0xE110.0000

0xE11F.FFFF

USB2.0 device

Configuration

registers

AHB

0xE120.0000

0xE12F.FFFF

USB2.0 device

Plug detect

AHB

0xE130.0000

0xE17F.FFFF

Reserved

AHB

0xE180.0000

0xE18F.FFFF

USB2.0 EHCI 0-1

AHB

0xE190.0000

0xE19F.FFFF

USB2.0 OHCI 0

AHB

0xE1A0.0000

0xE20F.FFFF

Reserved

AHB

0xE210.0000

0xE21F.FFFF

USB2.0 OHCI 1

AHB

0xE220.0000

0xE2FF.FFFF

Reserved

AHB

0xE280.0000

0xE280.FFFF

ML USB ARB

Configuration

AHB

0xE290.0000

0xE7FF.FFFF

Reserved

AHB

Table 6.

ML1 – Multi layer CPU subsystem

Start address

End address

Peripheral

Notes

Bus

0xF000.0000

0xF00F.FFFF

Timer

APB

0xF010.0000

0xF0FF.FFFF

Reserved

APB

0xF100.0000

0xF10F.FFFF

Reserved

AHB

0xF110.0000

0xF11F.FFFF

ITC Primary

AHB

0xF120.0000

0xF7FF.FFFF

Reserved

AHB

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