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H8/3003 Datasheet(PDF) 710 Page - Renesas Technology Corp |
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H8/3003 Datasheet(HTML) 710 Page - Renesas Technology Corp |
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710 / 715 page  Table D-1 Port States (cont) Hardware Software Bus- Program Pin Reset Standby Standby Released Execution Name Mode State Mode Mode Mode Sleep Mode P80 1 to 4 T T (RFSHE = 0) (RFSHE = 0) I/O port keep keep (RFSHE = 0) (RFSHE = 1) (RFSHE = 1) or RFSH RFSH H (RFSHE = 1) P83 to P81 1 to 4 T T (DDR = 0) keep Input port T (DDR = 0) or (DDR = 1) CS3 to CS1 H (DDR = 1) P84 1 to 4 L T (DDR = 0) keep Input port T (DDR = 0) (DDR = 1) or CS0 L (DDR = 1) P95 to P90 1 to 4 T T keep keep I/O port PA7 to PA0 1 to 4 T T keep keep I/O port PB7 to PB0 1 to 4 T T keep keep I/O port PC7, PC6 1 to 4 T T keep keep I/O port PC1, PC0 PC5 to PC2 1 to 4 T T (DDR = 0) keep Input port keep (DDR = 0) or (DDR = 1) CS7 to CS4 H (DDR = 1) Legend H: High L: Low T: High-impedance state keep: Input pins are in the high-impedance state; output pins maintain their previous state. DDR: Data direction register bit 692 |
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