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MC9S08DN60F1CLF Datasheet(PDF) 196 Page - Freescale Semiconductor, Inc |
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MC9S08DN60F1CLF Datasheet(HTML) 196 Page - Freescale Semiconductor, Inc |
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196 / 356 page  Chapter 11 Inter-Integrated Circuit (S08IICV2) MC9S08DN60 Series Data Sheet, Rev 3 196 Freescale Semiconductor 11.1.3 Block Diagram Figure 11-2 is a block diagram of the IIC. Figure 11-2. IIC Functional Block Diagram 11.2 External Signal Description This section describes each user-accessible pin signal. 11.2.1 SCL — Serial Clock Line The bidirectional SCL is the serial clock line of the IIC system. 11.2.2 SDA — Serial Data Line The bidirectional SDA is the serial data line of the IIC system. 11.3 Register Definition This section consists of the IIC register descriptions in address order. Input Sync In/Out Data Shift Register Address Compare Interrupt Clock Control Start Stop Arbitration Control CTRL_REG FREQ_REG ADDR_REG STATUS_REG DATA_REG ADDR_DECODE DATA_MUX Data Bus SCL SDA Address |
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