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PCIMX536AVV8B Datasheet(PDF) 25 Page - Freescale Semiconductor, Inc |
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PCIMX536AVV8B Datasheet(HTML) 25 Page - Freescale Semiconductor, Inc |
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25 / 180 page  Electrical Characteristics i.MX53xA Automotive and Infotainment Applications Processors, Rev. 1 Freescale Semiconductor 25 • NVCC_SRTC_POW should remain powered ON continuously, to maintain internal real-time clock status. Otherwise, it has to be powered ON together with VCC, or preceding VCC. • The VCC should be powered ON together, or any time after NVCC_SRTC_POW. • NVCC_CKIH should be powered ON after VCC is stable and before other IO supplies (NVCC_xxx) are powered ON. • IO Supplies (NVCC_xxx) below or equal to 2.8 V nom./3.1 V max. should not precede NVCC_CKIH. They can start powering ON during NVCC_CKIH ramp-up, before it is stabilized. Within this group, the supplies can be powered-up in any order. • IO Supplies (NVCC_xxx) above 2.8 V nom./3.1 V max. should be powered ON only after NVCC_CKIH is stable. • In case VDD_DIG_PLL and VDD_ANA_PLL are powered ON from internal voltage regulator (default case for i.MX53), there are no related restrictions on VDD_REG, as it is used as their internal regulators power source. If VDD_DIG_PLL and VDD_ANA_PLL are powered on externally, to reduce current leakage during the power-up, it is recommended to activate the VDD_REG before or at the same time with VDD_DIG_PLL and VDD_ANA_PLL. If this sequencing is not possible, make sure that the 2.5 V VDD_REG supply shut-off output impedance is higher than 1 k Ω when it is inactive. • VDD_REG supply is required to be powered ON to enable DDR operation. It must be powered on after VCC and before NVCC_EMI_DRAM. The sequence should be: VCC →VDD_REG →NVCC_EMI_DRAM • VDDA and VDDAL1 can be powered ON anytime before POR_B, regardless of any other power signal. • VDDGP can be powered ON anytime before POR_B, regardless of any other power signal. • VP and VPH can be powered up together, or anytime after, the VCC. VP and VPH should come before POR. • TVDAC_DHVDD and TVDAC_AHVDDRGB should be powered from the same regulator. This is due to ESD diode protection circuit, that may cause current leakage if one of the supplies is powered ON before the other. NOTE The POR_B input must be immediately asserted at power-up and remain asserted until after the last power rail reaches its working voltage. |
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