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PCIMX536AVV8B Datasheet(PDF) 43 Page - Freescale Semiconductor, Inc |
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PCIMX536AVV8B Datasheet(HTML) 43 Page - Freescale Semiconductor, Inc |
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43 / 180 page ![]() Electrical Characteristics i.MX53xA Automotive and Infotainment Applications Processors, Rev. 1 Freescale Semiconductor 43 4.6 System Modules Timing This section contains the timing and electrical parameters for the modules in the i.MX53xA processor. 4.6.1 Reset Timings Parameters Figure 8 shows the reset timing and Table 29 lists the timing parameters. Figure 8. Reset Timing Diagram 4.6.2 WDOG Reset Timing Parameters Figure 9 shows the WDOG reset timing and Table 30 lists the timing parameters. Figure 9. WATCHDOG_RST Timing Diagram Table 28. AC Electrical Characteristics of LVDS Pad Parameter Symbol Test Condition Min Typ Max Unit Differential pulse skew1 1 t SKD = | tPHLD –tPLHD |, is the magnitude difference in differential propagation delay time between the positive going edge and the negative going edge of the same channel. tSKD Rload = 100 Ω, Cload = 2 pF — — 0.25 ns Transition Low to High Time2 2 Measurement levels are 20-80% from output voltage. tTLH 0.26 — 0.5 Transition High to Low Time2 tTHL 0.26 — 0.5 Operating Frequency f — — 300 — MHz Offset voltage imbalance Vos — — — 150 mV Table 29. Reset Timing Parameters ID Parameter Min Max Unit CC1 Duration of RESET_IN to be qualified as valid (input slope = 5 ns) 50 — ns RESET_IN CC1 (Input) WATCHDOG_RST CC5 (Input) |
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