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PIC16F1526 Datasheet(PDF) 34 Page - Microchip Technology |
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PIC16F1526 Datasheet(HTML) 34 Page - Microchip Technology |
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34 / 354 page  PIC16(L)F1526/27 DS41458A-page 34 Preliminary 2011 Microchip Technology Inc. Bank 8 40Ch ANSELF ANSF7 ANSF6 ANSF5 ANSF4 ANSF3 ANSF2 ANSF1 ANSF0 1111 1111 1111 1111 40Dh ANSELG — — — ANSG4 ANSG3 ANSG2 ANSG1 — ---1 111- ---1 111- 40Eh — Unimplemented — — 40Fh — Unimplemented — — 410h — Unimplemented — — 411h TMR3L Holding Register for the Least Significant Byte of the 16-bit TMR3 Register xxxx xxxx uuuu uuuu 412h TMR3H Holding Register for the Most Significant Byte of the 16-bit TMR3 Register xxxx xxxx uuuu uuuu 413h T3CON TMR3CS<1:0> T3CKPS<1:0> SOSCEN T3SYNC —TMR3ON 0000 00-0 uuuu uu-u 414h T3GCON TMR3GE T3GPOL T3GTM T3GSPM T3GGO/ DONE T3GVAL T3GSS<1:0> 0000 0x00 uuuu uxuu 415h TMR4 Timer 4 Module Register 0000 0000 0000 0000 416h PR4 Timer 4 Period Register 1111 1111 1111 1111 417h T4CON — T4OUTPS<3:0> TMR4ON T4CKPS<1:0> -000 0000 -000 0000 418h TMR5L Holding Register for the Least Significant Byte of the 16-bit TMR5 Register xxxx xxxx uuuu uuuu 419h TMR5H Holding Register for the Most Significant Byte of the 16-bit TMR5 Register xxxx xxxx uuuu uuuu 41Ah T5CON TMR5CS<1:0> T5CKPS<1:0> SOSCEN T5SYNC —TMR5ON 0000 00-0 uuuu uu-u 41Bh T5GCON TMR5GE T5GPOL T5GTM T5GSPM T5GGO/ DONE T5GVAL T5GSS<1:0> 0000 0x00 uuuu uxuu 41Ch TMR6 Timer 6 Module Register 0000 0000 0000 0000 41Dh PR6 Timer 6 Period Register 1111 1111 1111 1111 41Eh T6CON — T6OUTPS<3:0> TMR6ON T6CKPS<1:0> -000 0000 -000 0000 41Fh — Unimplemented — — Bank 9 48Ch — Unimplemented — — 48Dh WPUG — —WPUG5 — — — — — --1- ---- --1- ---- 48Dh to 490h — Unimplemented — — 491h RC2REG USART Receive Data Register 0000 0000 0000 0000 492h TX2REG USART Transmit Data Register 0000 0000 0000 0000 493h SP2BRG BRG<7:0> 0000 0000 0000 0000 494h SP2BRGH BRG<15:8> 0000 0000 0000 0000 495h RC2STA SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 0000 000x 0000 000x 496h TX2STA CSRC TX9 TXEN SYNC SENDB BRGH TRMT TX9D 0000 0010 0000 0010 497h BAUD2CON ABDOVF RCIDL — SCKP BRG16 — WUE ABDEN 01-0 0-00 01-0 0-00 498h to 49Fh — Unimplemented — — TABLE 3-2: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED) Addr Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on POR, BOR Value on all other Resets Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved. Shaded locations are unimplemented, read as ‘0’. Note 1: PIC16F1526/7 only. 2: Unimplemented, read as ‘1’. |
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